Entity: punc_interlv_lut
- File: punc_interlv_lut.v
Diagram
Description
Ports
| Port name | Direction | Type | Description |
|---|---|---|---|
| rate | input | wire [4:0] | |
| idx_i | input | wire [8:0] | |
| idx_o | output | [17:0] | |
| punc_o | output | [1:0] |
Processes
- unnamed: ( )
Type: always
| Port name | Direction | Type | Description |
|---|---|---|---|
| rate | input | wire [4:0] | |
| idx_i | input | wire [8:0] | |
| idx_o | output | [17:0] | |
| punc_o | output | [1:0] |
Type: always