Entity: add_constReal_rst
- File: add_constReal_rst.vhd
Diagram
Ports
| Port name | Direction | Type | Description |
|---|---|---|---|
| rst_i | in | std_logic | |
| clk_i | in | std_logic | |
| rst_o | out | std_logic |
Signals
| Name | Type | Description |
|---|---|---|
| rst_sync_m1_s | std_logic | |
| rst_sync_s | std_logic |
Processes
- unnamed: ( clk_i )