Entity: dupplReal

Diagram

natural NB_OUTPUT natural DATA_SIZE std_logic data_en_i std_logic data_clk_i std_logic data_rst_i std_logic data_eof_i std_logic data_sof_i std_logic_vector(DATA_SIZE-1 downto 0) data_i std_logic data1_en_o std_logic data1_clk_o std_logic data1_rst_o std_logic data1_eof_o std_logic data1_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data1_o std_logic data2_en_o std_logic data2_clk_o std_logic data2_rst_o std_logic data2_eof_o std_logic data2_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data2_o std_logic data3_en_o std_logic data3_clk_o std_logic data3_rst_o std_logic data3_eof_o std_logic data3_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data3_o std_logic data4_en_o std_logic data4_clk_o std_logic data4_rst_o std_logic data4_eof_o std_logic data4_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data4_o std_logic data5_en_o std_logic data5_clk_o std_logic data5_rst_o std_logic data5_eof_o std_logic data5_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data5_o std_logic data6_en_o std_logic data6_clk_o std_logic data6_rst_o std_logic data6_eof_o std_logic data6_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data6_o std_logic data7_en_o std_logic data7_clk_o std_logic data7_rst_o std_logic data7_eof_o std_logic data7_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data7_o std_logic data8_en_o std_logic data8_clk_o std_logic data8_rst_o std_logic data8_eof_o std_logic data8_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data8_o std_logic data9_en_o std_logic data9_clk_o std_logic data9_rst_o std_logic data9_eof_o std_logic data9_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data9_o std_logic data10_en_o std_logic data10_clk_o std_logic data10_rst_o std_logic data10_eof_o std_logic data10_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data10_o std_logic data11_en_o std_logic data11_clk_o std_logic data11_rst_o std_logic data11_eof_o std_logic data11_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data11_o std_logic data12_en_o std_logic data12_clk_o std_logic data12_rst_o std_logic data12_eof_o std_logic data12_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data12_o std_logic data13_en_o std_logic data13_clk_o std_logic data13_rst_o std_logic data13_eof_o std_logic data13_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data13_o std_logic data14_en_o std_logic data14_clk_o std_logic data14_rst_o std_logic data14_eof_o std_logic data14_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data14_o std_logic data15_en_o std_logic data15_clk_o std_logic data15_rst_o std_logic data15_eof_o std_logic data15_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data15_o std_logic data16_en_o std_logic data16_clk_o std_logic data16_rst_o std_logic data16_eof_o std_logic data16_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data16_o std_logic data17_en_o std_logic data17_clk_o std_logic data17_rst_o std_logic data17_eof_o std_logic data17_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data17_o std_logic data18_en_o std_logic data18_clk_o std_logic data18_rst_o std_logic data18_eof_o std_logic data18_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data18_o std_logic data19_en_o std_logic data19_clk_o std_logic data19_rst_o std_logic data19_eof_o std_logic data19_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data19_o std_logic data20_en_o std_logic data20_clk_o std_logic data20_rst_o std_logic data20_eof_o std_logic data20_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data20_o std_logic data21_en_o std_logic data21_clk_o std_logic data21_rst_o std_logic data21_eof_o std_logic data21_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data21_o std_logic data22_en_o std_logic data22_clk_o std_logic data22_rst_o std_logic data22_eof_o std_logic data22_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data22_o std_logic data23_en_o std_logic data23_clk_o std_logic data23_rst_o std_logic data23_eof_o std_logic data23_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data23_o std_logic data24_en_o std_logic data24_clk_o std_logic data24_rst_o std_logic data24_eof_o std_logic data24_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data24_o std_logic data25_en_o std_logic data25_clk_o std_logic data25_rst_o std_logic data25_eof_o std_logic data25_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data25_o std_logic data26_en_o std_logic data26_clk_o std_logic data26_rst_o std_logic data26_eof_o std_logic data26_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data26_o std_logic data27_en_o std_logic data27_clk_o std_logic data27_rst_o std_logic data27_eof_o std_logic data27_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data27_o std_logic data28_en_o std_logic data28_clk_o std_logic data28_rst_o std_logic data28_eof_o std_logic data28_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data28_o std_logic data29_en_o std_logic data29_clk_o std_logic data29_rst_o std_logic data29_eof_o std_logic data29_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data29_o std_logic data30_en_o std_logic data30_clk_o std_logic data30_rst_o std_logic data30_eof_o std_logic data30_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data30_o std_logic data31_en_o std_logic data31_clk_o std_logic data31_rst_o std_logic data31_eof_o std_logic data31_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data31_o std_logic data32_en_o std_logic data32_clk_o std_logic data32_rst_o std_logic data32_eof_o std_logic data32_sof_o std_logic_vector(DATA_SIZE-1 downto 0) data32_o

Description

(c) Copyright: OscillatorIMP Digital Author : Gwenhael Goavec-Merougwenhael.goavec-merou@trabucayre.com

Creation date : 2014/10/14

Generics

Generic name Type Value Description
NB_OUTPUT natural 32
DATA_SIZE natural 8

Ports

Port name Direction Type Description
data_en_i in std_logic DATA in
data_clk_i in std_logic
data_rst_i in std_logic
data_eof_i in std_logic
data_sof_i in std_logic
data_i in std_logic_vector(DATA_SIZE-1 downto 0)
data1_en_o out std_logic ext
data1_clk_o out std_logic
data1_rst_o out std_logic
data1_eof_o out std_logic
data1_sof_o out std_logic
data1_o out std_logic_vector(DATA_SIZE-1 downto 0)
data2_en_o out std_logic
data2_clk_o out std_logic
data2_rst_o out std_logic
data2_eof_o out std_logic
data2_sof_o out std_logic
data2_o out std_logic_vector(DATA_SIZE-1 downto 0)
data3_en_o out std_logic
data3_clk_o out std_logic
data3_rst_o out std_logic
data3_eof_o out std_logic
data3_sof_o out std_logic
data3_o out std_logic_vector(DATA_SIZE-1 downto 0)
data4_en_o out std_logic
data4_clk_o out std_logic
data4_rst_o out std_logic
data4_eof_o out std_logic
data4_sof_o out std_logic
data4_o out std_logic_vector(DATA_SIZE-1 downto 0)
data5_en_o out std_logic
data5_clk_o out std_logic
data5_rst_o out std_logic
data5_eof_o out std_logic
data5_sof_o out std_logic
data5_o out std_logic_vector(DATA_SIZE-1 downto 0)
data6_en_o out std_logic
data6_clk_o out std_logic
data6_rst_o out std_logic
data6_eof_o out std_logic
data6_sof_o out std_logic
data6_o out std_logic_vector(DATA_SIZE-1 downto 0)
data7_en_o out std_logic
data7_clk_o out std_logic
data7_rst_o out std_logic
data7_eof_o out std_logic
data7_sof_o out std_logic
data7_o out std_logic_vector(DATA_SIZE-1 downto 0)
data8_en_o out std_logic
data8_clk_o out std_logic
data8_rst_o out std_logic
data8_eof_o out std_logic
data8_sof_o out std_logic
data8_o out std_logic_vector(DATA_SIZE-1 downto 0)
data9_en_o out std_logic
data9_clk_o out std_logic
data9_rst_o out std_logic
data9_eof_o out std_logic
data9_sof_o out std_logic
data9_o out std_logic_vector(DATA_SIZE-1 downto 0)
data10_en_o out std_logic
data10_clk_o out std_logic
data10_rst_o out std_logic
data10_eof_o out std_logic
data10_sof_o out std_logic
data10_o out std_logic_vector(DATA_SIZE-1 downto 0)
data11_en_o out std_logic
data11_clk_o out std_logic
data11_rst_o out std_logic
data11_eof_o out std_logic
data11_sof_o out std_logic
data11_o out std_logic_vector(DATA_SIZE-1 downto 0)
data12_en_o out std_logic
data12_clk_o out std_logic
data12_rst_o out std_logic
data12_eof_o out std_logic
data12_sof_o out std_logic
data12_o out std_logic_vector(DATA_SIZE-1 downto 0)
data13_en_o out std_logic
data13_clk_o out std_logic
data13_rst_o out std_logic
data13_eof_o out std_logic
data13_sof_o out std_logic
data13_o out std_logic_vector(DATA_SIZE-1 downto 0)
data14_en_o out std_logic
data14_clk_o out std_logic
data14_rst_o out std_logic
data14_eof_o out std_logic
data14_sof_o out std_logic
data14_o out std_logic_vector(DATA_SIZE-1 downto 0)
data15_en_o out std_logic
data15_clk_o out std_logic
data15_rst_o out std_logic
data15_eof_o out std_logic
data15_sof_o out std_logic
data15_o out std_logic_vector(DATA_SIZE-1 downto 0)
data16_en_o out std_logic
data16_clk_o out std_logic
data16_rst_o out std_logic
data16_eof_o out std_logic
data16_sof_o out std_logic
data16_o out std_logic_vector(DATA_SIZE-1 downto 0)
data17_en_o out std_logic
data17_clk_o out std_logic
data17_rst_o out std_logic
data17_eof_o out std_logic
data17_sof_o out std_logic
data17_o out std_logic_vector(DATA_SIZE-1 downto 0)
data18_en_o out std_logic
data18_clk_o out std_logic
data18_rst_o out std_logic
data18_eof_o out std_logic
data18_sof_o out std_logic
data18_o out std_logic_vector(DATA_SIZE-1 downto 0)
data19_en_o out std_logic
data19_clk_o out std_logic
data19_rst_o out std_logic
data19_eof_o out std_logic
data19_sof_o out std_logic
data19_o out std_logic_vector(DATA_SIZE-1 downto 0)
data20_en_o out std_logic
data20_clk_o out std_logic
data20_rst_o out std_logic
data20_eof_o out std_logic
data20_sof_o out std_logic
data20_o out std_logic_vector(DATA_SIZE-1 downto 0)
data21_en_o out std_logic
data21_clk_o out std_logic
data21_rst_o out std_logic
data21_eof_o out std_logic
data21_sof_o out std_logic
data21_o out std_logic_vector(DATA_SIZE-1 downto 0)
data22_en_o out std_logic
data22_clk_o out std_logic
data22_rst_o out std_logic
data22_eof_o out std_logic
data22_sof_o out std_logic
data22_o out std_logic_vector(DATA_SIZE-1 downto 0)
data23_en_o out std_logic
data23_clk_o out std_logic
data23_rst_o out std_logic
data23_eof_o out std_logic
data23_sof_o out std_logic
data23_o out std_logic_vector(DATA_SIZE-1 downto 0)
data24_en_o out std_logic
data24_clk_o out std_logic
data24_rst_o out std_logic
data24_eof_o out std_logic
data24_sof_o out std_logic
data24_o out std_logic_vector(DATA_SIZE-1 downto 0)
data25_en_o out std_logic
data25_clk_o out std_logic
data25_rst_o out std_logic
data25_eof_o out std_logic
data25_sof_o out std_logic
data25_o out std_logic_vector(DATA_SIZE-1 downto 0)
data26_en_o out std_logic
data26_clk_o out std_logic
data26_rst_o out std_logic
data26_eof_o out std_logic
data26_sof_o out std_logic
data26_o out std_logic_vector(DATA_SIZE-1 downto 0)
data27_en_o out std_logic
data27_clk_o out std_logic
data27_rst_o out std_logic
data27_eof_o out std_logic
data27_sof_o out std_logic
data27_o out std_logic_vector(DATA_SIZE-1 downto 0)
data28_en_o out std_logic
data28_clk_o out std_logic
data28_rst_o out std_logic
data28_eof_o out std_logic
data28_sof_o out std_logic
data28_o out std_logic_vector(DATA_SIZE-1 downto 0)
data29_en_o out std_logic
data29_clk_o out std_logic
data29_rst_o out std_logic
data29_eof_o out std_logic
data29_sof_o out std_logic
data29_o out std_logic_vector(DATA_SIZE-1 downto 0)
data30_en_o out std_logic
data30_clk_o out std_logic
data30_rst_o out std_logic
data30_eof_o out std_logic
data30_sof_o out std_logic
data30_o out std_logic_vector(DATA_SIZE-1 downto 0)
data31_en_o out std_logic
data31_clk_o out std_logic
data31_rst_o out std_logic
data31_eof_o out std_logic
data31_sof_o out std_logic
data31_o out std_logic_vector(DATA_SIZE-1 downto 0)
data32_en_o out std_logic
data32_clk_o out std_logic
data32_rst_o out std_logic
data32_eof_o out std_logic
data32_sof_o out std_logic
data32_o out std_logic_vector(DATA_SIZE-1 downto 0)