Entity: top_fft_tb

• File: top_fft_tb.vhd

Diagram

Description

Signals

Name	Type	Description
reset	std_logic
clk	std_logic
adc_clk	std_logic
start_prod	std_logic
data_in_s	std_logic_vector(DATA_SIZE-1 downto 0)	fft
data_in_en_s	std_logic
coeff_re_s	std_logic_vector(COEFF_SIZE-1 downto 0)
coeff_im_s	std_logic_vector(COEFF_SIZE-1 downto 0)
coeff_addr_s	std_logic_vector(COEFF_ADDR_SIZE-1 downto 0)
coeff_en_s	std_logic
res_re_s	std_logic_vector(DATA_OUT_SIZE-1 downto 0)	output data from FFT
res_im_s	std_logic_vector(DATA_OUT_SIZE-1 downto 0)	output data from FFT
res_en_s	std_logic
res_eof_s	std_logic
res_scale_re_s	std_logic_vector(DATA_STORE_SIZE-1 downto 0)
res_scale_im_s	std_logic_vector(DATA_STORE_SIZE-1 downto 0)
ram_addr_s	std_logic_vector(ADDR_SIZE-1 downto 0)	generator
tmp_data_s	std_logic_vector(DATA_SIZE-1 downto 0)
cpt_s	natural range 0 to 2**ADDR_SIZE
end_coeff_s	std_logic	read from file
end_read_s	std_logic	read from file
read_data_en_s	std_logic
read_data_val_s	std_logic_vector(DATA_SIZE-1 downto 0)
read_data_addr_s	std_logic_vector(ADDR_SIZE-1 downto 0)
rst_2	std_logic
reset_transfert	std_logic
start_acq	std_logic
prescaler_s	natural range 0 to MAX_VAL-1
tick_s	std_logic
state_s	gen_type
cpt2_s	natural range 0 to 2**FFT_SIZE
plop_s	std_logic

Constants

Name	Type	Value	Description
DATA_SIZE	natural	29
COEFF_SIZE	natural	18
DATA_OUT_SIZE	natural	40
ADDR_SIZE	natural	12
COEFF_ADDR_SIZE	natural	11
FFT_SIZE	natural	11
DATA_STORE_SIZE	natural	32
HALF_PERIODE	time	5.0 ns	Half clock period
ADC_PERIOD	time	2.5 ns	Half clock period
MAX_VAL	natural	2

Types

Name	Type	Description
gen_type	(IDLE, PROPAGATE, WAIT_END)

Processes

• timer_proc: ( clk )

• data_propagation: ( clk, rst_2 )

• stimulis: ( )

• clockp: ( )

• clockadc: ( )

• store_result: ( clk )

Instantiations

• fft_inst: work.fft_top_logic

• read_coeff: work.readComplexFromFile

• read_data: work.readFromFile

• ram_data: work.ram_storage16

State machines