Entity: io_GlitchFilter

Diagram

natural HIGH_SPIKE_SUPPRESSION_CYCLES natural LOW_SPIKE_SUPPRESSION_CYCLES std_logic Clock std_logic Input std_logic Output

Description

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Authors: Patrick Lehmann

Entity: Glitch Filter

Description:

This module filters glitches on a wire. The high and low spike suppression cycle counts can be configured.

License:

Copyright 2007-2016 Technische Universitaet Dresden - Germany Chair of VLSI-Design, Diagnostics and Architecture

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

    http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and

limitations under the License.

use PoC.io.all;

Generics

Generic name Type Value Description
HIGH_SPIKE_SUPPRESSION_CYCLES natural 5
LOW_SPIKE_SUPPRESSION_CYCLES natural 5

Ports

Port name Direction Type Description
Clock in std_logic
Input in std_logic
Output out std_logic

Signals

Name Type Description
State std_logic
NextState std_logic
TC_en std_logic
TC_Load std_logic
TC_Slot natural
TC_Timeout std_logic

Constants

Name Type Value Description
TTID_HIGH_SPIKE natural 0
TTID_LOW_SPIKE natural 1
TIMING_TABLE T_NATVEC ( TTID_HIGH_SPIKE => HIGH_SPIKE_SUPPRESSION_CYCLES,
TTID_LOW_SPIKE => LOW_SPIKE_SUPPRESSION_CYCLES )		 Timing table

Processes

Instantiations