Package: utils
- File: utils.vhdl
Constants
Name | Type | Value | Description |
---|---|---|---|
C_BCD_MINUS | T_BCD | "1010" | |
C_BCD_OFF | T_BCD | "1011" |
Types
Name | Type | Description |
---|---|---|
T_BOOLVEC | array(natural range <>) of boolean | deferred constant declaration Type declarations ========================================================================== + Vectors of primitive standard types +++++++++++++++++++++++++++++++++++++ |
T_INTVEC | array(natural range <>) of integer | |
T_NATVEC | array(natural range <>) of natural | |
T_POSVEC | array(natural range <>) of positive | |
T_REALVEC | array(natural range <>) of REAL | |
T_IPSTYLE | (IPSTYLE_UNKNOWN, IPSTYLE_HARD, IPSTYLE_SOFT) |
+ Enums ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Intellectual Property (IP) type |
T_BIT_ORDER | (LSB_FIRST, MSB_FIRST) |
Bit order |
T_BYTE_ORDER | (LITTLE_ENDIAN, BIG_ENDIAN) |
Byte order (Endian) |
T_POLARITY | (HIGH_ACTIVE, LOW_ACTIVE) |
Active logic level |
T_CLOCK_EDGE | (RISING_EDGE, FALLING_EDGE) |
active clock edge |
T_ROUNDING_STYLE | (ROUND_TO_NEAREST, ROUND_TO_ZERO, ROUND_TO_INF, ROUND_UP, ROUND_DOWN) |
rounding style |
T_BCD | define a new unrelated type T_BCD for arithmetic QUESTION: extract to an own BCD package? => overloaded operators for +/-/=/… and conversion functions | |
T_BCD_VECTOR | array(natural range <>) of T_BCD |
Functions
- div_ceil (a : natural;
b : positive) return natural
Description
Function declarations
==========================================================================
- Division ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Calculates: ceil(a / b)
- is_pow2 (int : natural) return boolean
Description
- Power +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
is input a power of 2?
- ceil_pow2 (int : natural) return positive
Description
round to next power of 2
- floor_pow2 (int : natural) return natural
Description
round to previous power of 2
- log2ceil (arg : positive) return natural
Description
- Logarithm ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Calculates: ceil(ld(arg))
- log2ceilnz (arg : positive) return positive
Description
Calculates: max(1, ceil(ld(arg)))
- log10ceil (arg : positive) return natural
Description
Calculates: ceil(lg(arg))
- log10ceilnz (arg : positive) return positive
Description
Calculates: max(1, ceil(lg(arg)))
- ite (cond : boolean;
value1 : boolean;
value2 : boolean) return boolean
Description
- if-then-else (ite) +++++++++++++++++++++++++++++++++++++++++++++++++++++
- ite (cond : boolean;
value1 : integer;
value2 : integer) return integer
- ite (cond : boolean;
value1 : REAL;
value2 : REAL) return REAL
- ite (cond : boolean;
value1 : std_logic;
value2 : std_logic) return std_logic
- ite (cond : boolean;
value1 : std_logic_vector;
value2 : std_logic_vector) return std_logic_vector
- ite (cond : boolean;
value1 : bit_vector;
value2 : bit_vector) return bit_vector
- ite (cond : boolean;
value1 : unsigned;
value2 : unsigned) return unsigned
- ite (cond : boolean;
value1 : signed;
value2 : signed) return signed
- ite (cond : boolean;
value1 : character;
value2 : character) return character
- ite (cond : boolean;
value1 : string;
value2 : string) return string
- inc_if (cond : boolean;
value : integer;
increment : integer := 1) return integer
Description
conditional increment / decrement
- dec_if (cond : boolean;
value : integer;
decrement : integer := 1) return integer
- imin (arg1 : integer;
arg2 : integer) return integer
Description
Calculates: min(arg1, arg2) for integers
- imin (vec : T_INTVEC) return integer
Description
Calculates: min(vec) for a integer vector
- imin (vec : T_NATVEC) return natural
Description
Calculates: min(vec) for a natural vector
- imin (vec : T_POSVEC) return positive
Description
Calculates: min(vec) for a positive vector
- rmin (vec : T_REALVEC) return real
Description
Calculates: min(vec) of real vector
- imax (arg1 : integer;
arg2 : integer) return integer
Description
Calculates: max(arg1, arg2) for integers
- imax (vec : T_INTVEC) return integer
Description
Calculates: max(vec) for a integer vector
- imax (vec : T_NATVEC) return natural
Description
Calculates: max(vec) for a natural vector
- imax (vec : T_POSVEC) return positive
Description
Calculates: max(vec) for a positive vector
- rmax (vec : T_REALVEC) return real
Description
Calculates: max(vec) of real vector
- isum (vec : T_NATVEC) return natural
Description
Calculates: sum(vec) for a natural vector
- isum (vec : T_POSVEC) return natural
Description
Calculates: sum(vec) for a positive vector
- isum (vec : T_INTVEC) return integer
Description
Calculates: sum(vec) of integer vector
- rsum (vec : T_REALVEC) return real
Description
Calculates: sum(vec) of real vector
- to_int (bool : boolean;
zero : integer := 0;
one : integer := 1) return integer
Description
- Conversions ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
to integer: to_int
- to_int (sl : std_logic;
zero : integer := 0;
one : integer := 1) return integer
- to_sl (Value : boolean) return std_logic
Description
to std_logic: to_sl
- to_sl (Value : character) return std_logic
- to_slv (Value : natural;
Size : positive) return std_logic_vector
Description
short for std_logic_vector(to_unsigned(Value, Size))
- to_BCD (Digit : integer) return T_BCD
- to_BCD (Digit : character) return T_BCD
- to_BCD (Digit : unsigned) return T_BCD
- to_BCD (Digit : std_logic_vector) return T_BCD
- to_BCD_Vector (Value : integer;
Size : natural := 0;
Fill : T_BCD := x"0") return T_BCD_VECTOR
- to_BCD_Vector (Value : string;
Size : natural := 0;
Fill : T_BCD := x"0") return T_BCD_VECTOR
- bound (index : integer;
lowerBound : integer;
upperBound : integer) return integer
Description
TODO: comment
- to_index (slv : unsigned;
max : natural := 0) return integer
- to_index (slv : std_logic_vector;
max : natural := 0) return integer
- is_sl (c : character) return boolean
Description
is_*
- slv_or (vec : std_logic_vector) return std_logic
Description
- Basic Vector Utilities +++++++++++++++++++++++++++++++++++++++++++++++++
Aggregate functions
- slv_nor (vec : std_logic_vector) return std_logic
- slv_and (vec : std_logic_vector) return std_logic
- slv_nand (vec : std_logic_vector) return std_logic
- slv_xor (vec : std_logic_vector) return std_logic
- reverse (vec : std_logic_vector) return std_logic_vector
Description
NO slv_xnor! This operation would not be well-defined as
not xor(vec) /= vec_{n-1} xnor … xnor vec_1 xnor vec_0 iff n is odd.
Reverses the elements of the passed Vector.
@synthesis supported
- reverse (vec : bit_vector) return bit_vector
- reverse (vec : unsigned) return unsigned
- scale (Value : integer;
Minimum : integer;
Maximum : integer;
RoundingStyle : T_ROUNDING_STYLE := ROUND_TO_NEAREST) return integer
Description
scale a value into a range [Minimum, Maximum]
- scale (Value : REAL;
Minimum : integer;
Maximum : integer;
RoundingStyle : T_ROUNDING_STYLE := ROUND_TO_NEAREST) return integer
- scale (Value : REAL;
Minimum : REAL;
Maximum : REAL) return REAL
- resize (vec : bit_vector;
length : natural;
fill : bit := '0') return bit_vector
Description
Resizes the vector to the specified length. The adjustment is make on
on the 'high end of the vector. The 'low index remains as in the argument.
If the result vector is larger, the extension uses the provided fill value
(default: '0').
Use the resize functions of the numeric_std package for value-preserving
resizes of the signed and unsigned data types.
@synthesis supported
- resize (vec : std_logic_vector;
length : natural;
fill : std_logic := '0') return std_logic_vector
- move (vec : std_logic_vector;
ofs : integer) return std_logic_vector
Description
Shift the index range of a vector by the specified offset.
- movez (vec : std_logic_vector) return std_logic_vector
Description
Shift the index range of a vector making vec'low = 0.
- ascend (vec : std_logic_vector) return std_logic_vector
- descend (vec : std_logic_vector) return std_logic_vector
- lssb (arg : std_logic_vector) return std_logic_vector
Description
Least-Significant Set Bit (lssb):
Computes a vector of the same length as the argument with
at most one bit set at the rightmost '1' found in arg.
@synthesis supported
- lssb (arg : bit_vector) return bit_vector
- lssb_idx (arg : std_logic_vector) return integer
Description
Returns the index of the least-significant set bit.
@synthesis supported
- lssb_idx (arg : bit_vector) return integer
- mssb (arg : std_logic_vector) return std_logic_vector
Description
Most-Significant Set Bit (mssb): computes a vector of the same length
with at most one bit set at the leftmost '1' found in arg.
- mssb (arg : bit_vector) return bit_vector
- mssb_idx (arg : std_logic_vector) return integer
- mssb_idx (arg : bit_vector) return integer
- swap (slv : std_logic_vector;
Size : positive) return std_logic_vector
Description
Swap sub vectors in vector (endian reversal)
- bit_swap (slv : std_logic_vector;
Chunksize : positive) return std_logic_vector
Description
Swap the bits in a chunk
- genmask_high (Bits : natural;
MaskLength : positive) return std_logic_vector
Description
generate bit masks
- genmask_low (Bits : natural;
MaskLength : positive) return std_logic_vector
- genmask_alternate (len : positive;
lsb : std_logic := '0') return std_logic_vector
- onehot2bin (onehot : std_logic_vector;
empty_val : integer := -1) return unsigned
Description
Encodings
===========================================================================
One-Hot-Code to Binary-Code.
If a non-negative value empty_val is specified, its unsigned
representation will be returned upon an all-zero input. As a consequence
of specifying this value, no simulation warnings will be issued upon empty
inputs. Alleged 1-hot-encoded inputs with more than one bit asserted
will always raise a simulation warning.
- gray2bin (gray_val : std_logic_vector) return std_logic_vector
Description
Converts Gray-Code into Binary-Code.
@synthesis supported
- gray2bin (gray_val : std_logic_vector) return unsigned
- bin2onehot (value : std_logic_vector) return std_logic_vector
Description
Binary-Code to One-Hot-Code
- bin2onehot (value : unsigned) return std_logic_vector
- bin2onecold (value : std_logic_vector) return std_logic_vector
Description
Binary-Code to One-Cold-Code
- bin2onecold (value : unsigned) return std_logic_vector
- bin2gray (value : std_logic_vector) return std_logic_vector
Description
Binary-Code to Gray-Code
- bin2gray (value : unsigned) return std_logic_vector