Entity: AdiConfigSlave

Diagram

time TPD_G sl clk sl sclk sl csb slv(31 downto 0) rdData sl sdio sl wrEn sl rdEn slv(12 downto 0) addr slv(31 downto 0) wrData slv(3 downto 0) byteValid

Description


Company : SLAC National Accelerator Laboratory

Description: An implementation of the common SPI configuration interface

use by many AnalogDevices chips.

This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to

the terms contained in the LICENSE.txt file.

Generics

Generic name Type Value Description
TPD_G time 1 ns

Ports

Port name Direction Type Description
clk in sl
sclk in sl
sdio inout sl
csb in sl
wrEn out sl
rdEn out sl
addr out slv(12 downto 0)
wrData out slv(31 downto 0)
byteValid out slv(3 downto 0)
rdData in slv(31 downto 0)

Signals

Name Type Description
r RegType
rin RegType
sdioRes sl
sdioSync sl
sdioRise sl
sdioFall sl
sclkRes sl
sclkSync sl
sclkRise sl
sclkFall sl
csbRes sl
csbSync sl
csbRise sl
csbFall sl

Constants

Name Type Value Description
REG_INIT_C RegType ( state => WAIT_CSB_FALL_S,
count => (others => '0'),
shift => (others => '0'),
bytes => (others => '0'),
wrEn => '0',
rdEn => '0',
addr => (others => '0'),
wrData => (others => '0'),
byteValid => (others => '0'),
dataOut => '1')

Types

Name Type Description
StateType ( WAIT_CSB_FALL_S,
SHIFT_HEADER_S,
LATCH_HEADER_S,
WRITE_S,
LATCH_WRITE_BYTE_S,
READ_WAIT_S,
LATCH_READ_BYTE_S,
READ_S,
WAIT_SCLK_RISE_S)
RegType

Processes

Instantiations