Package: AxiStreamDmaRingPkg

• File: AxiStreamDmaRingPkg.vhd

Constants

Name	Type	Value	Description
AXIL_MASTERS_C	integer	6
START_AXIL_C	integer	0
END_AXIL_C	integer	1
NEXT_AXIL_C	integer	2
TRIG_AXIL_C	integer	3
MODE_AXIL_C	integer	4
STATUS_AXIL_C	integer	5
EMPTY_C	integer	0	Status constants
FULL_C	integer	1
DONE_C	integer	2
TRIGGERED_C	integer	3
ERROR_C	integer	4
ENABLED_C	integer	0	Not currently used
DONE_WHEN_FULL_C	integer	1
INIT_C	integer	2
SOFT_TRIGGER_C	integer	3
INIT_BYTE_C	integer	INIT_C / 8
BUFFER_CLEAR_OFFSET_C	slv(7 downto 0)	X"18"
DMA_RING_STATUS_CONFIG_C	AxiStreamConfigType	( TSTRB_EN_C => false, TDATA_BYTES_C => 1, TDEST_BITS_C => 0, TID_BITS_C => 0, TKEEP_MODE_C => TKEEP_FIXED_C, --ite(BSA_STREAM_BYTE_WIDTH_G = 4, TKEEP_FIXED_C, TKEEP_COMP_C), TUSER_BITS_C => 1, TUSER_MODE_C => TUSER_NONE_C)

Functions

• getBufferAddr ( baseAddr : slv(31 downto 0);
  busIndex : integer range 0 to 7;
  buf : slv(5 downto 0) := (others => '0');
  high : sl := '0') return slv

• getBufferAddr ( baseAddr : slv(31 downto 0);
  busIndex : integer range 0 to 7;
  buf : integer range 0 to 63 := 0;
  high : sl := '0') return slv