Entity: chksum_tb

Diagram

Description


Title : RSSI Protocol: https://confluence.slac.stanford.edu/x/1IyfD

Company : SLAC National Accelerator Laboratory

Description: Simulation Testbed for testing the RSSI chksum

This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to

the terms contained in the LICENSE.txt file.

uncomment the following library declaration if using arithmetic functions with signed or unsigned values use ieee.numeric_std.all;

Signals

Name Type Description
clk_i std_logic Inputs
rst_i std_logic
enable_i std_logic
strobe_i std_logic
init_i std_logic_vector(15 downto 0)
data_i std_logic_vector(63 downto 0)
chksum_o std_logic_vector(15 downto 0) Outputs
valid_o std_logic signal chksumReg_o : std_logic_vector(15 downto 0);
check_o std_logic

Constants

Name Type Value Description
clk_i_period time 10 ns Clock period definitions

Processes

Description
Clock process definitions

Description
Stimulus process

Instantiations