Entity: DescrambleTb
Diagram
Description
Company : SLAC National Accelerator Laboratory
Description: Simulation testbed for JESD Descrambling
This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to
the terms contained in the LICENSE.txt file.
Signals
| Name |
Type |
Description |
| clk_i |
sl |
Clocking |
| rst_i |
sl |
|
| subClass_i |
sl |
--------------------------- Port Signals --------------------------- |
| sysRef_i |
sl |
|
| clearErr_i |
sl |
|
| enable_i |
sl |
|
| replEnable_i |
sl |
|
| scrEnable_i |
sl |
|
| r_jesdGtRx |
jesdGtRxLaneType |
|
| lmfc_i |
sl |
|
| nSyncAny_i |
sl |
|
| nSyncAnyD1_i |
sl |
|
| nSync_o |
sl |
|
| dataValid_o |
sl |
|
| sampleData_o |
slv((GT_WORD_SIZE_C*8)-1 downto 0) |
|
| status_o |
slv((RX_STAT_WIDTH_C)-1 downto 0) |
|
| s_sysrefRe |
sl |
|
| s_lmfc |
sl |
|
| dataArray |
dataArrayType |
|
| charArray |
charArrayType |
|
Constants
| Name |
Type |
Value |
Description |
| CLK_PERIOD_C |
time |
10 ns |
|
| TPD_C |
time |
1 ns |
|
Types
| Name |
Type |
Description |
| dataArrayType |
|
|
| charArrayType |
|
|
Processes
Instantiations
- DDR_ClkRst_Inst: surf.ClkRst
- JesdRxLane_INST: surf.JesdRxLane
Description
component instantiation
- LmfcGen_INST: surf.JesdLmfcGen
Description
LMFC period generator aligned to SYSREF input