Entity: DualPortRam

Diagram

time TPD_G sl RST_POLARITY_G string MEMORY_TYPE_G boolean REG_EN_G boolean DOA_REG_G boolean DOB_REG_G string MODE_G boolean BYTE_WR_EN_G integer range 1 to (2**24) DATA_WIDTH_G integer BYTE_WIDTH_G integer range 1 to (2**24) ADDR_WIDTH_G slv INIT_G sl clka sl ena sl wea slv(wordCount(DATA_WIDTH_G, BYTE_WIDTH_G)-1 downto 0) weaByte sl rsta slv(ADDR_WIDTH_G-1 downto 0) addra slv(DATA_WIDTH_G-1 downto 0) dina sl regcea sl clkb sl enb sl rstb slv(ADDR_WIDTH_G-1 downto 0) addrb sl regceb slv(DATA_WIDTH_G-1 downto 0) douta slv(DATA_WIDTH_G-1 downto 0) doutb

Description


Company : SLAC National Accelerator Laboratory

Description: This module infers either Block RAM or distributed RAM

This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to

the terms contained in the LICENSE.txt file.

Generics

Generic name Type Value Description
TPD_G time 1 ns
RST_POLARITY_G sl '1' '1' for active high rst, '0' for active low
MEMORY_TYPE_G string "block"
REG_EN_G boolean true This generic only with BRAM
DOA_REG_G boolean false This generic only with BRAM
DOB_REG_G boolean false This generic only with LUTRAM
MODE_G string "read-first"
BYTE_WR_EN_G boolean false
DATA_WIDTH_G integer range 1 to (2**24) 16
BYTE_WIDTH_G integer 8 If BRAM, should be multiple of 8 or 9
ADDR_WIDTH_G integer range 1 to (2**24) 4
INIT_G slv "0"

Ports

Port name Direction Type Description
clka in sl Port A
ena in sl
wea in sl
weaByte in slv(wordCount(DATA_WIDTH_G, BYTE_WIDTH_G)-1 downto 0)
rsta in sl
addra in slv(ADDR_WIDTH_G-1 downto 0)
dina in slv(DATA_WIDTH_G-1 downto 0)
douta out slv(DATA_WIDTH_G-1 downto 0)
regcea in sl
clkb in sl Port B
enb in sl
rstb in sl
addrb in slv(ADDR_WIDTH_G-1 downto 0)
doutb out slv(DATA_WIDTH_G-1 downto 0)
regceb in sl

Constants

Name Type Value Description
FORCE_RST_C sl not(RST_POLARITY_G)