Entity: HtspCoreTb
- File: HtspCoreTb.vhd
Diagram
Description
Title : HTSP: https://confluence.slac.stanford.edu/x/pQmODw
Company : SLAC National Accelerator Laboratory
Description: Simulation Testbed for testing the HtspCore
This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to
the terms contained in the LICENSE.txt file.
Signals
Name | Type | Description |
---|---|---|
txusrclk2 | sl | |
clk | sl | |
rst | sl | |
axilReadMaster | AxiLiteReadMasterType | |
axilReadSlave | AxiLiteReadSlaveType | |
axilWriteMaster | AxiLiteWriteMasterType | |
axilWriteSlave | AxiLiteWriteSlaveType | |
phyTxMaster | AxiStreamMasterType | |
phyTxSlave | AxiStreamSlaveType | |
txMaster | AxiStreamMasterType | |
txSlave | AxiStreamSlaveType | |
phyMaster | AxiStreamMasterType | |
rxMaster | AxiStreamMasterType | |
phyRxMaster | AxiStreamMasterType | |
htspTxMasters | AxiStreamMasterArray(NUM_VC_C-1 downto 0) | |
htspTxSlaves | AxiStreamSlaveArray(NUM_VC_C-1 downto 0) | |
htspRxMasters | AxiStreamMasterArray(NUM_VC_C-1 downto 0) | |
htspRxCtrl | AxiStreamCtrlArray(NUM_VC_C-1 downto 0) | |
rxMasters | AxiStreamMasterArray(NUM_VC_C-1 downto 0) | |
rxSlaves | AxiStreamSlaveArray(NUM_VC_C-1 downto 0) | |
updateDet | slv(NUM_VC_C-1 downto 0) | |
errorDet | slv(NUM_VC_C-1 downto 0) | |
passed | sl | |
failed | sl |
Constants
Name | Type | Value | Description |
---|---|---|---|
TPD_G | time | 1 ns | |
PRBS_SEED_SIZE_C | positive | 512 | |
NUM_VC_C | positive | 4 | constant PRBS_SEED_SIZE_C : positive := 32; constant NUM_VC_C : positive := 1; |
TX_MAX_PAYLOAD_SIZE_C | positive | 2048 | |
CHOKE_AXIS_CONFIG_C | AxiStreamConfigType | ssiAxiStreamConfig(8) | |
PKT_LEN_C | slv(31 downto 0) | x"000000FF" | constant CHOKE_AXIS_CONFIG_C : AxiStreamConfigType := ssiAxiStreamConfig(64); |
Processes
- PHY_AXIS: ( rxMaster )
- unnamed: ( clk )
- unnamed: ( failed, passed )
- test: ( )
Description
------------------------------- AXI-Lite Register Transactions -------------------------------
Instantiations
- U_Clk_0: surf.ClkRst
- U_Clk_1: surf.ClkRst
- U_Core: surf.HtspCore
- U_TX_FIFO: surf.AxiStreamFifoV2
- U_RX_FIFO: surf.AxiStreamFifoV2