Entity: I2cRegMaster
- File: I2cRegMaster.vhd
Diagram
Description
File : I2cRegMaster.vhd
Company : SLAC National Accelerator Laboratory
Description: PRESCALE_G = (clk_freq / (5 * i2c_freq)) - 1
FILTER_G = (min_pulse_time / clk_period) + 1
This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to
the terms contained in the LICENSE.txt file.
Generics
Generic name | Type | Value | Description |
---|---|---|---|
TPD_G | time | 1 ns | |
OUTPUT_EN_POLARITY_G | integer range 0 to 1 | 0 | |
FILTER_G | integer range 2 to 512 | 8 | |
PRESCALE_G | integer range 0 to 655535 | 62 |
Ports
Port name | Direction | Type | Description |
---|---|---|---|
clk | in | sl | |
srst | in | sl | |
arst | in | sl | |
regIn | in | I2cRegMasterInType | |
regOut | out | I2cRegMasterOutType | |
i2ci | in | i2c_in_type | |
i2co | out | i2c_out_type |
Signals
Name | Type | Description |
---|---|---|
r | RegType | |
rin | RegType | |
i2cMasterIn | I2cMasterInType | |
i2cMasterOut | I2cMasterOutType |
Constants
Name | Type | Value | Description |
---|---|---|---|
REG_INIT_C | RegType | ( state => WAIT_REQ_S, byteCount => (others => '0'), regOut => ( regAck => '0', regFail => '0', regFailCode => (others => '0'), regRdData => (others => '0')), i2cMasterIn => ( enable => '0', prescale => (others => '0'), filter => (others => '0'), txnReq => '0', stop => '0', op => '0', busReq => '0', addr => (others => '0'), tenbit => '0', wrValid => '0', wrData => (others => '0'), rdAck => '0')) |
Types
Name | Type | Description |
---|---|---|
StateType | ( WAIT_REQ_S, ADDR_S, WRITE_S, READ_TXN_S, READ_S, BUS_ACK_S, REG_ACK_S) |
|
RegType |
Functions
- getIndex ( endianness : sl;
byteCount : unsigned;
totalBytes : unsigned) return integer
Processes
- comb: ( regIn, i2cMasterOut, r, srst )
- seq: ( clk, arst )
Instantiations
- i2cMaster_1: surf.I2cMaster