Package: Jesd204bPkg
- File: Jesd204bPkg.vhd
Constants
| Name | Type | Value | Description |
|---|---|---|---|
| GT_WORD_SIZE_C | positive | 4 | |
| K_CHAR_C | slv(7 downto 0) | x"BC" | 8B10B characters (8-bit values) K.28.5 |
| R_CHAR_C | slv(7 downto 0) | x"1C" | K.28.0 |
| A_CHAR_C | slv(7 downto 0) | x"7C" | K.28.3 |
| F_CHAR_C | slv(7 downto 0) | x"FC" | K.28.7 |
| SYSRF_DLY_WIDTH_C | positive | 8 | Register or counter widths |
| RX_STAT_WIDTH_C | positive | 19 + 2*GT_WORD_SIZE_C | |
| TX_STAT_WIDTH_C | positive | 6 | |
| AXI_PACKET_SIZE_DEFAULT_C | slv(23 downto 0) | x"00_01_00" | AXI packet size at power up |
| PER_STEP_WIDTH_C | positive | 16 | TX specific Ramp step or square wave period slv width (max 16) |
| JESD_PRBS_TAPS_C | NaturalArray | (0 => 14, 1 => 15) |
Scrambler/Descrambler PBRS taps for 1 + x^14 + x^15 |
| JESD_GT_RX_LANE_INIT_C | jesdGtRxLaneType | ( data => (others => '0'), dataK => (others => '0'), dispErr => (others => '0'), decErr => (others => '0'), rstDone => '0', cdrStable => '0' ) |
|
| JESD_GT_TX_LANE_INIT_C | jesdGtTxLaneType | ( data => (others => '0'), dataK => (others => '0')) |
Types
| Name | Type | Description |
|---|---|---|
| jesdGtRxLaneType | Sub-types ------------------------------------------------------------------------ | |
| jesdGtTxLaneType | ||
| jesdGtRxLaneTypeArray | array (natural range <>) of jesdGtRxLaneType | Arrays |
| jesdGtTxLaneTypeArray | array (natural range <>) of jesdGtTxLaneType | |
| fixLatDataArray | array (natural range <>) of slv((GT_WORD_SIZE_C8+GT_WORD_SIZE_C2)-1 downto 0) | |
| sampleDataArray | array (natural range <>) of slv((GT_WORD_SIZE_C*8)-1 downto 0) | |
| sampleDataVectorArray | array (natural range<>, natural range<>) of slv((GT_WORD_SIZE_C*8)-1 downto 0) |
|
| rxStatuRegisterArray | array (natural range <>) of slv((RX_STAT_WIDTH_C)-1 downto 0) | |
| txStatuRegisterArray | array (natural range <>) of slv((TX_STAT_WIDTH_C)-1 downto 0) | |
| alignTxArray | array (natural range <>) of slv((GT_WORD_SIZE_C)-1 downto 0) |
Functions
- detKcharFunc (data_slv : slv;
charisk_slv : slv;
bytes_int : positive) return std_logic
Description
Functions
Detect K character
- varIndexOutFunc (shft_slv : slv;
index_slv : slv) return std_logic
Description
Output variable index from SLV (use in variable length shift register)
- detectPosFuncSwap (data_slv : slv;
charisk_slv : slv;
bytes_int : positive) return std_logic_vector
Description
Detect position of first non K character (Swapped)
- detectPosFunc (data_slv : slv;
charisk_slv : slv;
bytes_int : positive) return std_logic_vector
Description
Detect position of first non K character
- byteSwapSlv (data_slv : slv;
bytes_int : positive) return std_logic_vector
Description
Byte swap slv (bytes int 2 or 4)
- endianSwapSlv (data_slv : slv;
bytes_int : positive) return std_logic_vector
Description
Swap little and big endians (bytes int 2 or 4)
- JesdDataAlign (data_slv : slv;
position_slv : slv;
bytes_int : positive) return std_logic_vector
Description
Align the data within the data buffer according to the position of the byte alignment word
- JesdCharAlign (char_slv : slv;
position_slv : slv;
bytes_int : positive) return std_logic_vector
Description
Align the character within the buffer according to the position of the byte alignment word
- slvToInt (data_slv : slv) return integer
Description
Convert standard logic vector to integer
- intToSlv (data_int : integer;
bytes_int : positive) return std_logic_vector
Description
Convert integer to standard logic vector
- outSampleZero (F_int : positive;
bytes_int : positive) return std_logic_vector
Description
Output offset binary zero
- invSigned (input : slv) return std_logic_vector
Description
Invert functions
Invert signed
- invData (data : slv;
F_int : positive;
bytes_int : positive) return std_logic_vector
- jesdScrambler ( dataIn : in slv(15 downto 0);
lfsrIn : in slv(14 downto 0);
dataOut : inout slv(15 downto 0);
lfsrOut : inout slv(14 downto 0)) return ()