Entity: Jesd204bTb
- File: Jesd204bTb.vhd
Diagram
Description
Company : SLAC National Accelerator Laboratory
Description: Simulation testbed for Jesd204b
This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to
the terms contained in the LICENSE.txt file.
Signals
| Name | Type | Description |
|---|---|---|
| clk | sl | |
| rst | sl | |
| rstL | sl | |
| configDone | sl | |
| sysRef | sl | |
| nSync | sl | |
| jesdGtTxArr | jesdGtTxLaneType | |
| jesdGtRxArr | jesdGtRxLaneType | |
| txReadMaster | AxiLiteReadMasterType | |
| txReadSlave | AxiLiteReadSlaveType | |
| txWriteMaster | AxiLiteWriteMasterType | |
| txWriteSlave | AxiLiteWriteSlaveType | |
| rxReadMaster | AxiLiteReadMasterType | |
| rxReadSlave | AxiLiteReadSlaveType | |
| rxWriteMaster | AxiLiteWriteMasterType | |
| rxWriteSlave | AxiLiteWriteSlaveType | |
| txData | slv(31 downto 0) | |
| rxValid | sl | |
| rxData | slv(31 downto 0) | |
| nextRxData | slv(31 downto 0) | |
| cnt | slv(6 downto 0) | |
| rxDataErrorDet | sl | |
| data | slv(63 downto 0) | |
| dataK | slv(7 downto 0) | |
| kCharDet | slv(3 downto 0) | |
| rCharDet | slv(3 downto 0) | |
| aCharDet | slv(3 downto 0) | |
| fCharDet | slv(3 downto 0) |
Constants
| Name | Type | Value | Description |
|---|---|---|---|
| CLK_PERIOD_C | time | 1 us | 1 us makes it easy to count clock cycles in sim GUI |
| TPD_G | time | CLK_PERIOD_C/4 | |
| EN_SCRAMBLER_C | boolean | true | |
| BYTE_SHIFT_C | natural range 0 to 3 | 3 | ------------------------------------------------------ BYTE_SHIFT_C=0: JesdRx.JesdAlignChGen.position="0001" BYTE_SHIFT_C=1: JesdRx.JesdAlignChGen.position="1000" BYTE_SHIFT_C=2: JesdRx.JesdAlignChGen.position="0100" BYTE_SHIFT_C=3: JesdRx.JesdAlignChGen.position="0010" ------------------------------------------------------ |
Processes
- unnamed: ( clk )
Description
------------------- Generate a counter -------------------
- unnamed: ( clk )
Description
---------------------------------- Generate SLV to test unaligned byte compensations in the JESD RX ----------------------------------
- unnamed: ( jesdGtRxArr )
Description
--------------------------------- Adding char detect for debugging ---------------------------------
- config: ( )
Description
------------------------- Configure the JESD RX/TX -------------------------
Instantiations
- U_ClkRst: surf.ClkRst
- U_Jesd204bTx: surf.Jesd204bTx
Description
JESD TX Module
- U_Jesd204bRx: surf.Jesd204bRx