Entity: Pgp2bGtx7FixedLatTb

Diagram

Description


Title : PGPv2b: https://confluence.slac.stanford.edu/x/q86fD

Company : SLAC National Accelerator Laboratory

Description: Simulation Testbed for Pgp2bGtx7FixedLat

This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to

the terms contained in the LICENSE.txt file.


Signals

Name Type Description
stableClkIn sl [in]
extRst sl [in]
txPllLock sl [out]
rxPllLock sl [out]
pgpTxClkOut sl [out]
pgpRxClkOut sl [out]
pgpRxRstOut sl [out]
stableClkOut sl [out]
pgpRxIn Pgp2bRxInType [in]
pgpRxOut Pgp2bRxOutType [out]
pgpTxIn Pgp2bTxInType [in]
pgpTxOut Pgp2bTxOutType [out]
pgpTxMasters AxiStreamMasterArray(3 downto 0) [in]
pgpTxSlaves AxiStreamSlaveArray(3 downto 0) [out]
pgpRxMasters AxiStreamMasterArray(3 downto 0) [out]
pgpRxMasterMuxed AxiStreamMasterType [out]
pgpRxCtrl AxiStreamCtrlArray(3 downto 0) [in]
gtgClk sl [in]
gtClk0P sl [in]
gtClk0N sl [in]
gtClk1P sl [in]
gtClk1N sl [in]
gtTxP sl [out]
gtTxN sl [out]
gtRxP sl [in]
gtRxN sl [in]
txPreCursor slv(4 downto 0) [in]
txPostCursor slv(4 downto 0) [in]
txDiffCtrl slv(3 downto 0) [in]
axilClk sl [in]
axilRst sl [in]
axilReadMaster AxiLiteReadMasterType [in]
axilReadSlave AxiLiteReadSlaveType [out]
axilWriteMaster AxiLiteWriteMasterType [in]
axilWriteSlave AxiLiteWriteSlaveType

Constants

Name Type Value Description
VC_INTERLEAVE_G integer 0
PAYLOAD_CNT_TOP_G integer 7
NUM_VC_EN_G integer range 1 to 4 4
TX_ENABLE_G boolean true
RX_ENABLE_G boolean true
TX_CM_EN_G boolean true
TX_CM_CLKIN_PERIOD_G real 8.000
TX_CM_DIVCLK_DIVIDE_G natural 8
TX_CM_CLKFBOUT_MULT_F_G real 8.000
TX_CM_CLKOUT_DIVIDE_F_G real 8.000
RX_CM_EN_G boolean false
RX_CM_CLKIN_PERIOD_G real 8.000
RX_CM_DIVCLK_DIVIDE_G natural 8
RX_CM_CLKFBOUT_MULT_F_G real 8.000
RX_CM_CLKOUT_DIVIDE_F_G real 8.000
RX_OS_CFG_G bit_vector "0000010000000"
RXCDR_CFG_G bit_vector x"03000023ff40200020"
RXDFEXYDEN_G sl '0'
RX_DFE_KL_CFG2_G bit_vector x"3008E56A"
STABLE_CLK_SRC_G string "stableClkIn"
TX_REFCLK_SRC_G string "gtClk0"
RX_REFCLK_SRC_G string "gtClk1"
CPLL_CFG_G Gtx7CPllCfgType getGtx7CPllCfg(125.0E6,
2.5E9)
QPLL_CFG_G Gtx7QPllCfgType getGtx7QPllCfg(125.0e6,
2.5e9)
TX_PLL_G string "QPLL"
RX_PLL_G string "CPLL"

Instantiations