Entity: SfixedAccumulator

Diagram

time TPD_G string XIL_DEVICE_G integer ILEAVE_CHAN_G integer USER_WIDTH_G boolean REG_IN_G boolean REG_OUT_G sl clk sl rst sl validIn slv(USER_WIDTH_G - 1 downto 0) userIn sfixed din sl validOut slv(USER_WIDTH_G - 1 downto 0) userOut sfixed dout

Description

Company : SLAC National Accelerator Laboratory

Description: sfixed accumultaor, supports interleaved channels

This file is part of 'SLAC Firmware Standard Library'. It is subject to the license terms in the LICENSE.txt file found in the top-level directory of this distribution and at: https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. No part of 'SLAC Firmware Standard Library', including this file, may be copied, modified, propagated, or distributed except according to

the terms contained in the LICENSE.txt file.

Generics

Generic name Type Value Description
TPD_G time 1 ns
XIL_DEVICE_G string "ULTRASCALE_PLUS"
ILEAVE_CHAN_G integer 1
USER_WIDTH_G integer 0
REG_IN_G boolean true
REG_OUT_G boolean true

Ports

Port name Direction Type Description
clk in sl
rst in sl
validIn in sl inputs
userIn in slv(USER_WIDTH_G - 1 downto 0)
din in sfixed
validOut out sl outputs
userOut out slv(USER_WIDTH_G - 1 downto 0)
dout out sfixed

Signals

Name Type Description
r RegType
rin RegType
sumDly sfixed(dout'range)
userDelayIn slv(userIn'length downto 0) add 1 bit so we can delay valid and user together
userDelayOut slv(userIn'length downto 0)

Constants

Name Type Value Description
TOT_LATENCY_C integer 1 + ite(REG_IN_G,
1,
0) + ite(REG_OUT_G,
1,
0)
INT_OVERFLOW_STYLE_C fixed_overflow_style_type fixed_wrap
INT_ROUNDING_STYLE_C fixed_round_style_type fixed_truncate
REG_INIT_C RegType ( rst => '0',
dinR => (others => '0'),
doutR => (others => '0'),
sum => (others => '0'))

Types

Name Type Description
RegType

Processes

Instantiations