Entity: axi_read_slave Diagram axi_slave_t axi_slave std_logic aclk std_logic arvalid std_logic_vector arid std_logic_vector araddr std_logic_vector arlen std_logic_vector arsize axi_burst_type_t arburst std_logic rready std_logic arready std_logic rvalid std_logic_vector rid std_logic_vector rdata axi_resp_t rresp std_logic rlast
Description Generics
Generic name
Type
Value
Description
axi_slave
axi_slave_t
Ports
Port name
Direction
Type
Description
aclk
in
std_logic
arvalid
in
std_logic
arready
out
std_logic
arid
in
std_logic_vector
araddr
in
std_logic_vector
arlen
in
std_logic_vector
arsize
in
std_logic_vector
arburst
in
axi_burst_type_t
rvalid
out
std_logic
rready
in
std_logic
rid
out
std_logic_vector
rdata
out
std_logic_vector
rresp
out
axi_resp_t
rlast
out
std_logic
Signals
Name
Type
Description
initialized
boolean
Processes