Package: csrng_reg_pkg

Description

Copyright lowRISC contributors.
Licensed under the Apache License, Version 2.0, see LICENSE for details.
SPDX-License-Identifier: Apache-2.0

Register Package auto-generated by reggen containing data structure

Constants

Name Type Value Description
NumAlerts int 2
BlockAw int 7 Address widths within the block
BlockAw logic [BlockAw-1:0] undefined Register offsets
BlockAw logic [BlockAw-1:0] 4
BlockAw logic [BlockAw-1:0] 8
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 10
BlockAw logic [BlockAw-1:0] 14
BlockAw logic [BlockAw-1:0] 18
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 20
BlockAw logic [BlockAw-1:0] 24
BlockAw logic [BlockAw-1:0] 28
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 30
BlockAw logic [BlockAw-1:0] 34
BlockAw logic [BlockAw-1:0] 38
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 40
BlockAw logic [BlockAw-1:0] 44
CSRNG_INTR_TEST_RESVAL logic [3:0] undefined Reset values for hwext registers and their fields
CSRNG_INTR_TEST_CS_CMD_REQ_DONE_RESVAL logic [0:0] undefined
CSRNG_INTR_TEST_CS_ENTROPY_REQ_RESVAL logic [0:0] undefined
CSRNG_INTR_TEST_CS_HW_INST_EXC_RESVAL logic [0:0] undefined
CSRNG_INTR_TEST_CS_FATAL_ERR_RESVAL logic [0:0] undefined
CSRNG_ALERT_TEST_RESVAL logic [1:0] undefined
CSRNG_ALERT_TEST_RECOV_ALERT_RESVAL logic [0:0] undefined
CSRNG_ALERT_TEST_FATAL_ALERT_RESVAL logic [0:0] undefined
CSRNG_GENBITS_VLD_RESVAL logic [1:0] undefined
CSRNG_GENBITS_RESVAL logic [31:0] undefined
CSRNG_INT_STATE_VAL_RESVAL logic [31:0]
CSRNG_PERMIT logic [3:0] undefined Register width information to check illegal writes

Types

Name Type Description
csrng_reg2hw_intr_state_reg_t struct packed {
struct packed {
logic q;
} cs_cmd_req_done;
struct packed {
logic q;
} cs_entropy_req;
struct packed {
logic q;
} cs_hw_inst_exc;
struct packed {
logic q;
} cs_fatal_err;
}		 ////////////////////////// Typedefs for registers // //////////////////////////
csrng_reg2hw_intr_enable_reg_t struct packed {
struct packed {
logic q;
} cs_cmd_req_done;
struct packed {
logic q;
} cs_entropy_req;
struct packed {
logic q;
} cs_hw_inst_exc;
struct packed {
logic q;
} cs_fatal_err;
}
csrng_reg2hw_intr_test_reg_t struct packed {
struct packed {
logic q;
logic qe;
} cs_cmd_req_done;
struct packed {
logic q;
logic qe;
} cs_entropy_req;
struct packed {
logic q;
logic qe;
} cs_hw_inst_exc;
struct packed {
logic q;
logic qe;
} cs_fatal_err;
}
csrng_reg2hw_alert_test_reg_t struct packed {
struct packed {
logic q;
logic qe;
} recov_alert;
struct packed {
logic q;
logic qe;
} fatal_alert;
}
csrng_reg2hw_ctrl_reg_t struct packed {
struct packed {
logic [3:0] q;
} enable;
struct packed {
logic [3:0] q;
} sw_app_enable;
struct packed {
logic [3:0] q;
} read_int_state;
}
csrng_reg2hw_cmd_req_reg_t struct packed {
logic [31:0] q;
logic qe;
}
csrng_reg2hw_genbits_reg_t struct packed {
logic [31:0] q;
logic re;
}
csrng_reg2hw_int_state_num_reg_t struct packed {
logic [3:0] q;
logic qe;
}
csrng_reg2hw_int_state_val_reg_t struct packed {
logic [31:0] q;
logic re;
}
csrng_reg2hw_err_code_test_reg_t struct packed {
logic [4:0] q;
logic qe;
}
csrng_reg2hw_sel_tracking_sm_reg_t struct packed {
logic [1:0] q;
}
csrng_hw2reg_intr_state_reg_t struct packed {
struct packed {
logic d;
logic de;
} cs_cmd_req_done;
struct packed {
logic d;
logic de;
} cs_entropy_req;
struct packed {
logic d;
logic de;
} cs_hw_inst_exc;
struct packed {
logic d;
logic de;
} cs_fatal_err;
}
csrng_hw2reg_sw_cmd_sts_reg_t struct packed {
struct packed {
logic d;
logic de;
} cmd_rdy;
struct packed {
logic d;
logic de;
} cmd_sts;
}
csrng_hw2reg_genbits_vld_reg_t struct packed {
struct packed {
logic d;
} genbits_vld;
struct packed {
logic d;
} genbits_fips;
}
csrng_hw2reg_genbits_reg_t struct packed {
logic [31:0] d;
}
csrng_hw2reg_int_state_val_reg_t struct packed {
logic [31:0] d;
}
csrng_hw2reg_hw_exc_sts_reg_t struct packed {
logic [14:0] d;
logic de;
}
csrng_hw2reg_recov_alert_sts_reg_t struct packed {
struct packed {
logic d;
logic de;
} enable_field_alert;
struct packed {
logic d;
logic de;
} sw_app_enable_field_alert;
struct packed {
logic d;
logic de;
} read_int_state_field_alert;
}
csrng_hw2reg_err_code_reg_t struct packed {
struct packed {
logic d;
logic de;
} sfifo_cmd_err;
struct packed {
logic d;
logic de;
} sfifo_genbits_err;
struct packed {
logic d;
logic de;
} sfifo_cmdreq_err;
struct packed {
logic d;
logic de;
} sfifo_rcstage_err;
struct packed {
logic d;
logic de;
} sfifo_keyvrc_err;
struct packed {
logic d;
logic de;
} sfifo_updreq_err;
struct packed {
logic d;
logic de;
} sfifo_bencreq_err;
struct packed {
logic d;
logic de;
} sfifo_bencack_err;
struct packed {
logic d;
logic de;
} sfifo_pdata_err;
struct packed {
logic d;
logic de;
} sfifo_final_err;
struct packed {
logic d;
logic de;
} sfifo_gbencack_err;
struct packed {
logic d;
logic de;
} sfifo_grcstage_err;
struct packed {
logic d;
logic de;
} sfifo_ggenreq_err;
struct packed {
logic d;
logic de;
} sfifo_gadstage_err;
struct packed {
logic d;
logic de;
} sfifo_ggenbits_err;
struct packed {
logic d;
logic de;
} sfifo_blkenc_err;
struct packed {
logic d;
logic de;
} cmd_stage_sm_err;
struct packed {
logic d;
logic de;
} main_sm_err;
struct packed {
logic d;
logic de;
} drbg_gen_sm_err;
struct packed {
logic d;
logic de;
} drbg_updbe_sm_err;
struct packed {
logic d;
logic de;
} drbg_updob_sm_err;
struct packed {
logic d;
logic de;
} aes_cipher_sm_err;
struct packed {
logic d;
logic de;
} fifo_write_err;
struct packed {
logic d;
logic de;
} fifo_read_err;
struct packed {
logic d;
logic de;
} fifo_state_err;
}
csrng_hw2reg_tracking_sm_obs_reg_t struct packed {
struct packed {
logic [7:0] d;
logic de;
} tracking_sm_obs0;
struct packed {
logic [7:0] d;
logic de;
} tracking_sm_obs1;
struct packed {
logic [7:0] d;
logic de;
} tracking_sm_obs2;
struct packed {
logic [7:0] d;
logic de;
} tracking_sm_obs3;
}
csrng_reg2hw_t struct packed {
csrng_reg2hw_intr_state_reg_t intr_state;
csrng_reg2hw_intr_enable_reg_t intr_enable;
csrng_reg2hw_intr_test_reg_t intr_test;
csrng_reg2hw_alert_test_reg_t alert_test;
csrng_reg2hw_ctrl_reg_t ctrl;
csrng_reg2hw_cmd_req_reg_t cmd_req;
csrng_reg2hw_genbits_reg_t genbits;
csrng_reg2hw_int_state_num_reg_t int_state_num;
csrng_reg2hw_int_state_val_reg_t int_state_val;
csrng_reg2hw_err_code_test_reg_t err_code_test;
csrng_reg2hw_sel_tracking_sm_reg_t sel_tracking_sm;
}		 Register -> HW type
csrng_hw2reg_t struct packed {
csrng_hw2reg_intr_state_reg_t intr_state;
csrng_hw2reg_sw_cmd_sts_reg_t sw_cmd_sts;
csrng_hw2reg_genbits_vld_reg_t genbits_vld;
csrng_hw2reg_genbits_reg_t genbits;
csrng_hw2reg_int_state_val_reg_t int_state_val;
csrng_hw2reg_hw_exc_sts_reg_t hw_exc_sts;
csrng_hw2reg_recov_alert_sts_reg_t recov_alert_sts;
csrng_hw2reg_err_code_reg_t err_code;
csrng_hw2reg_tracking_sm_obs_reg_t tracking_sm_obs;
}		 HW -> register type