Package: gpio_reg_pkg

Description

Copyright lowRISC contributors.
Licensed under the Apache License, Version 2.0, see LICENSE for details.
SPDX-License-Identifier: Apache-2.0

Register Package auto-generated by reggen containing data structure

Constants

Name Type Value Description
NumAlerts int 1
BlockAw int 6 Address widths within the block
BlockAw logic [BlockAw-1:0] undefined Register offsets
BlockAw logic [BlockAw-1:0] 4
BlockAw logic [BlockAw-1:0] 8
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 10
BlockAw logic [BlockAw-1:0] 14
BlockAw logic [BlockAw-1:0] 18
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 20
BlockAw logic [BlockAw-1:0] 24
BlockAw logic [BlockAw-1:0] 28
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 30
BlockAw logic [BlockAw-1:0] 34
BlockAw logic [BlockAw-1:0] 38
BlockAw logic [BlockAw-1:0] c
GPIO_INTR_TEST_RESVAL logic [31:0] undefined Reset values for hwext registers and their fields
GPIO_INTR_TEST_GPIO_RESVAL logic [31:0] undefined
GPIO_ALERT_TEST_RESVAL logic [0:0] undefined
GPIO_ALERT_TEST_FATAL_FAULT_RESVAL logic [0:0] undefined
GPIO_DIRECT_OUT_RESVAL logic [31:0] undefined
GPIO_MASKED_OUT_LOWER_RESVAL logic [31:0] undefined
GPIO_MASKED_OUT_UPPER_RESVAL logic [31:0] undefined
GPIO_DIRECT_OE_RESVAL logic [31:0] undefined
GPIO_MASKED_OE_LOWER_RESVAL logic [31:0] undefined
GPIO_MASKED_OE_UPPER_RESVAL logic [31:0]
GPIO_PERMIT logic [3:0] undefined Register width information to check illegal writes

Types

Name Type Description
gpio_reg2hw_intr_state_reg_t struct packed {
logic [31:0] q;
}		 ////////////////////////// Typedefs for registers // //////////////////////////
gpio_reg2hw_intr_enable_reg_t struct packed {
logic [31:0] q;
}
gpio_reg2hw_intr_test_reg_t struct packed {
logic [31:0] q;
logic qe;
}
gpio_reg2hw_alert_test_reg_t struct packed {
logic q;
logic qe;
}
gpio_reg2hw_direct_out_reg_t struct packed {
logic [31:0] q;
logic qe;
}
gpio_reg2hw_masked_out_lower_reg_t struct packed {
struct packed {
logic [15:0] q;
logic qe;
} data;
struct packed {
logic [15:0] q;
logic qe;
} mask;
}
gpio_reg2hw_masked_out_upper_reg_t struct packed {
struct packed {
logic [15:0] q;
logic qe;
} data;
struct packed {
logic [15:0] q;
logic qe;
} mask;
}
gpio_reg2hw_direct_oe_reg_t struct packed {
logic [31:0] q;
logic qe;
}
gpio_reg2hw_masked_oe_lower_reg_t struct packed {
struct packed {
logic [15:0] q;
logic qe;
} data;
struct packed {
logic [15:0] q;
logic qe;
} mask;
}
gpio_reg2hw_masked_oe_upper_reg_t struct packed {
struct packed {
logic [15:0] q;
logic qe;
} data;
struct packed {
logic [15:0] q;
logic qe;
} mask;
}
gpio_reg2hw_intr_ctrl_en_rising_reg_t struct packed {
logic [31:0] q;
}
gpio_reg2hw_intr_ctrl_en_falling_reg_t struct packed {
logic [31:0] q;
}
gpio_reg2hw_intr_ctrl_en_lvlhigh_reg_t struct packed {
logic [31:0] q;
}
gpio_reg2hw_intr_ctrl_en_lvllow_reg_t struct packed {
logic [31:0] q;
}
gpio_reg2hw_ctrl_en_input_filter_reg_t struct packed {
logic [31:0] q;
}
gpio_hw2reg_intr_state_reg_t struct packed {
logic [31:0] d;
logic de;
}
gpio_hw2reg_data_in_reg_t struct packed {
logic [31:0] d;
logic de;
}
gpio_hw2reg_direct_out_reg_t struct packed {
logic [31:0] d;
}
gpio_hw2reg_masked_out_lower_reg_t struct packed {
struct packed {
logic [15:0] d;
} data;
struct packed {
logic [15:0] d;
} mask;
}
gpio_hw2reg_masked_out_upper_reg_t struct packed {
struct packed {
logic [15:0] d;
} data;
struct packed {
logic [15:0] d;
} mask;
}
gpio_hw2reg_direct_oe_reg_t struct packed {
logic [31:0] d;
}
gpio_hw2reg_masked_oe_lower_reg_t struct packed {
struct packed {
logic [15:0] d;
} data;
struct packed {
logic [15:0] d;
} mask;
}
gpio_hw2reg_masked_oe_upper_reg_t struct packed {
struct packed {
logic [15:0] d;
} data;
struct packed {
logic [15:0] d;
} mask;
}
gpio_reg2hw_t struct packed {
gpio_reg2hw_intr_state_reg_t intr_state;
gpio_reg2hw_intr_enable_reg_t intr_enable;
gpio_reg2hw_intr_test_reg_t intr_test;
gpio_reg2hw_alert_test_reg_t alert_test;
gpio_reg2hw_direct_out_reg_t direct_out;
gpio_reg2hw_masked_out_lower_reg_t masked_out_lower;
gpio_reg2hw_masked_out_upper_reg_t masked_out_upper;
gpio_reg2hw_direct_oe_reg_t direct_oe;
gpio_reg2hw_masked_oe_lower_reg_t masked_oe_lower;
gpio_reg2hw_masked_oe_upper_reg_t masked_oe_upper;
gpio_reg2hw_intr_ctrl_en_rising_reg_t intr_ctrl_en_rising;
gpio_reg2hw_intr_ctrl_en_falling_reg_t intr_ctrl_en_falling;
gpio_reg2hw_intr_ctrl_en_lvlhigh_reg_t intr_ctrl_en_lvlhigh;
gpio_reg2hw_intr_ctrl_en_lvllow_reg_t intr_ctrl_en_lvllow;
gpio_reg2hw_ctrl_en_input_filter_reg_t ctrl_en_input_filter;
}		 Register -> HW type
gpio_hw2reg_t struct packed {
gpio_hw2reg_intr_state_reg_t intr_state;
gpio_hw2reg_data_in_reg_t data_in;
gpio_hw2reg_direct_out_reg_t direct_out;
gpio_hw2reg_masked_out_lower_reg_t masked_out_lower;
gpio_hw2reg_masked_out_upper_reg_t masked_out_upper;
gpio_hw2reg_direct_oe_reg_t direct_oe;
gpio_hw2reg_masked_oe_lower_reg_t masked_oe_lower;
gpio_hw2reg_masked_oe_upper_reg_t masked_oe_upper;
}		 HW -> register type