Package: i2c_reg_pkg
- File: i2c_reg_pkg.sv
Description
Copyright lowRISC contributors.
Licensed under the Apache License, Version 2.0, see LICENSE for details.
SPDX-License-Identifier: Apache-2.0
Register Package auto-generated by reggen
containing data structure
Constants
Name | Type | Value | Description |
---|---|---|---|
FifoDepth | int | 64 | |
NumAlerts | int | 1 | |
BlockAw | int | 7 | Address widths within the block |
BlockAw | logic [BlockAw-1:0] | undefined | Register offsets |
BlockAw | logic [BlockAw-1:0] | 4 | |
BlockAw | logic [BlockAw-1:0] | 8 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 10 | |
BlockAw | logic [BlockAw-1:0] | 14 | |
BlockAw | logic [BlockAw-1:0] | 18 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 20 | |
BlockAw | logic [BlockAw-1:0] | 24 | |
BlockAw | logic [BlockAw-1:0] | 28 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 30 | |
BlockAw | logic [BlockAw-1:0] | 34 | |
BlockAw | logic [BlockAw-1:0] | 38 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 40 | |
BlockAw | logic [BlockAw-1:0] | 44 | |
BlockAw | logic [BlockAw-1:0] | 48 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 50 | |
BlockAw | logic [BlockAw-1:0] | 54 | |
BlockAw | logic [BlockAw-1:0] | 58 | |
I2C_INTR_TEST_RESVAL | logic [15:0] | undefined | Reset values for hwext registers and their fields |
I2C_INTR_TEST_FMT_WATERMARK_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_RX_WATERMARK_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_FMT_OVERFLOW_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_RX_OVERFLOW_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_NAK_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_SCL_INTERFERENCE_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_SDA_INTERFERENCE_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_STRETCH_TIMEOUT_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_SDA_UNSTABLE_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_TRANS_COMPLETE_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_TX_EMPTY_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_TX_NONEMPTY_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_TX_OVERFLOW_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_ACQ_OVERFLOW_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_ACK_STOP_RESVAL | logic [0:0] | undefined | |
I2C_INTR_TEST_HOST_TIMEOUT_RESVAL | logic [0:0] | undefined | |
I2C_ALERT_TEST_RESVAL | logic [0:0] | undefined | |
I2C_ALERT_TEST_FATAL_FAULT_RESVAL | logic [0:0] | undefined | |
I2C_STATUS_RESVAL | logic [9:0] | c | |
I2C_STATUS_FMTEMPTY_RESVAL | logic [0:0] | undefined | |
I2C_STATUS_HOSTIDLE_RESVAL | logic [0:0] | undefined | |
I2C_STATUS_TARGETIDLE_RESVAL | logic [0:0] | undefined | |
I2C_STATUS_RXEMPTY_RESVAL | logic [0:0] | undefined | |
I2C_STATUS_TXEMPTY_RESVAL | logic [0:0] | undefined | |
I2C_STATUS_ACQEMPTY_RESVAL | logic [0:0] | undefined | |
I2C_RDATA_RESVAL | logic [7:0] | undefined | |
I2C_FIFO_STATUS_RESVAL | logic [30:0] | undefined | |
I2C_VAL_RESVAL | logic [31:0] | undefined | |
I2C_ACQDATA_RESVAL | logic [9:0] | ||
I2C_PERMIT | logic [3:0] | undefined | Register width information to check illegal writes |
Types
Name | Type | Description |
---|---|---|
i2c_reg2hw_intr_state_reg_t | struct packed { struct packed { logic q; } fmt_watermark; struct packed { logic q; } rx_watermark; struct packed { logic q; } fmt_overflow; struct packed { logic q; } rx_overflow; struct packed { logic q; } nak; struct packed { logic q; } scl_interference; struct packed { logic q; } sda_interference; struct packed { logic q; } stretch_timeout; struct packed { logic q; } sda_unstable; struct packed { logic q; } trans_complete; struct packed { logic q; } tx_empty; struct packed { logic q; } tx_nonempty; struct packed { logic q; } tx_overflow; struct packed { logic q; } acq_overflow; struct packed { logic q; } ack_stop; struct packed { logic q; } host_timeout; } |
////////////////////////// Typedefs for registers // ////////////////////////// |
i2c_reg2hw_intr_enable_reg_t | struct packed { struct packed { logic q; } fmt_watermark; struct packed { logic q; } rx_watermark; struct packed { logic q; } fmt_overflow; struct packed { logic q; } rx_overflow; struct packed { logic q; } nak; struct packed { logic q; } scl_interference; struct packed { logic q; } sda_interference; struct packed { logic q; } stretch_timeout; struct packed { logic q; } sda_unstable; struct packed { logic q; } trans_complete; struct packed { logic q; } tx_empty; struct packed { logic q; } tx_nonempty; struct packed { logic q; } tx_overflow; struct packed { logic q; } acq_overflow; struct packed { logic q; } ack_stop; struct packed { logic q; } host_timeout; } |
|
i2c_reg2hw_intr_test_reg_t | struct packed { struct packed { logic q; logic qe; } fmt_watermark; struct packed { logic q; logic qe; } rx_watermark; struct packed { logic q; logic qe; } fmt_overflow; struct packed { logic q; logic qe; } rx_overflow; struct packed { logic q; logic qe; } nak; struct packed { logic q; logic qe; } scl_interference; struct packed { logic q; logic qe; } sda_interference; struct packed { logic q; logic qe; } stretch_timeout; struct packed { logic q; logic qe; } sda_unstable; struct packed { logic q; logic qe; } trans_complete; struct packed { logic q; logic qe; } tx_empty; struct packed { logic q; logic qe; } tx_nonempty; struct packed { logic q; logic qe; } tx_overflow; struct packed { logic q; logic qe; } acq_overflow; struct packed { logic q; logic qe; } ack_stop; struct packed { logic q; logic qe; } host_timeout; } |
|
i2c_reg2hw_alert_test_reg_t | struct packed { logic q; logic qe; } |
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i2c_reg2hw_ctrl_reg_t | struct packed { struct packed { logic q; } enablehost; struct packed { logic q; } enabletarget; struct packed { logic q; } llpbk; } |
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i2c_reg2hw_rdata_reg_t | struct packed { logic [7:0] q; logic re; } |
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i2c_reg2hw_fdata_reg_t | struct packed { struct packed { logic [7:0] q; logic qe; } fbyte; struct packed { logic q; logic qe; } start; struct packed { logic q; logic qe; } stop; struct packed { logic q; logic qe; } read; struct packed { logic q; logic qe; } rcont; struct packed { logic q; logic qe; } nakok; } |
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i2c_reg2hw_fifo_ctrl_reg_t | struct packed { struct packed { logic q; logic qe; } rxrst; struct packed { logic q; logic qe; } fmtrst; struct packed { logic [2:0] q; logic qe; } rxilvl; struct packed { logic [1:0] q; logic qe; } fmtilvl; struct packed { logic q; logic qe; } acqrst; struct packed { logic q; logic qe; } txrst; } |
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i2c_reg2hw_ovrd_reg_t | struct packed { struct packed { logic q; } txovrden; struct packed { logic q; } sclval; struct packed { logic q; } sdaval; } |
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i2c_reg2hw_timing0_reg_t | struct packed { struct packed { logic [15:0] q; } thigh; struct packed { logic [15:0] q; } tlow; } |
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i2c_reg2hw_timing1_reg_t | struct packed { struct packed { logic [15:0] q; } t_r; struct packed { logic [15:0] q; } t_f; } |
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i2c_reg2hw_timing2_reg_t | struct packed { struct packed { logic [15:0] q; } tsu_sta; struct packed { logic [15:0] q; } thd_sta; } |
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i2c_reg2hw_timing3_reg_t | struct packed { struct packed { logic [15:0] q; } tsu_dat; struct packed { logic [15:0] q; } thd_dat; } |
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i2c_reg2hw_timing4_reg_t | struct packed { struct packed { logic [15:0] q; } tsu_sto; struct packed { logic [15:0] q; } t_buf; } |
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i2c_reg2hw_timeout_ctrl_reg_t | struct packed { struct packed { logic [30:0] q; } val; struct packed { logic q; } en; } |
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i2c_reg2hw_target_id_reg_t | struct packed { struct packed { logic [6:0] q; } address0; struct packed { logic [6:0] q; } mask0; struct packed { logic [6:0] q; } address1; struct packed { logic [6:0] q; } mask1; } |
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i2c_reg2hw_acqdata_reg_t | struct packed { struct packed { logic [7:0] q; logic re; } abyte; struct packed { logic [1:0] q; logic re; } signal; } |
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i2c_reg2hw_txdata_reg_t | struct packed { logic [7:0] q; logic qe; } |
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i2c_reg2hw_stretch_ctrl_reg_t | struct packed { struct packed { logic q; } en_addr_tx; struct packed { logic q; } en_addr_acq; struct packed { logic q; } stop_tx; struct packed { logic q; } stop_acq; } |
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i2c_reg2hw_host_timeout_ctrl_reg_t | struct packed { logic [31:0] q; } |
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i2c_hw2reg_intr_state_reg_t | struct packed { struct packed { logic d; logic de; } fmt_watermark; struct packed { logic d; logic de; } rx_watermark; struct packed { logic d; logic de; } fmt_overflow; struct packed { logic d; logic de; } rx_overflow; struct packed { logic d; logic de; } nak; struct packed { logic d; logic de; } scl_interference; struct packed { logic d; logic de; } sda_interference; struct packed { logic d; logic de; } stretch_timeout; struct packed { logic d; logic de; } sda_unstable; struct packed { logic d; logic de; } trans_complete; struct packed { logic d; logic de; } tx_empty; struct packed { logic d; logic de; } tx_nonempty; struct packed { logic d; logic de; } tx_overflow; struct packed { logic d; logic de; } acq_overflow; struct packed { logic d; logic de; } ack_stop; struct packed { logic d; logic de; } host_timeout; } |
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i2c_hw2reg_status_reg_t | struct packed { struct packed { logic d; } fmtfull; struct packed { logic d; } rxfull; struct packed { logic d; } fmtempty; struct packed { logic d; } hostidle; struct packed { logic d; } targetidle; struct packed { logic d; } rxempty; struct packed { logic d; } txfull; struct packed { logic d; } acqfull; struct packed { logic d; } txempty; struct packed { logic d; } acqempty; } |
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i2c_hw2reg_rdata_reg_t | struct packed { logic [7:0] d; } |
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i2c_hw2reg_fifo_status_reg_t | struct packed { struct packed { logic [6:0] d; } fmtlvl; struct packed { logic [6:0] d; } txlvl; struct packed { logic [6:0] d; } rxlvl; struct packed { logic [6:0] d; } acqlvl; } |
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i2c_hw2reg_val_reg_t | struct packed { struct packed { logic [15:0] d; } scl_rx; struct packed { logic [15:0] d; } sda_rx; } |
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i2c_hw2reg_acqdata_reg_t | struct packed { struct packed { logic [7:0] d; } abyte; struct packed { logic [1:0] d; } signal; } |
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i2c_hw2reg_stretch_ctrl_reg_t | struct packed { struct packed { logic d; logic de; } stop_tx; struct packed { logic d; logic de; } stop_acq; } |
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i2c_reg2hw_t | struct packed { i2c_reg2hw_intr_state_reg_t intr_state; i2c_reg2hw_intr_enable_reg_t intr_enable; i2c_reg2hw_intr_test_reg_t intr_test; i2c_reg2hw_alert_test_reg_t alert_test; i2c_reg2hw_ctrl_reg_t ctrl; i2c_reg2hw_rdata_reg_t rdata; i2c_reg2hw_fdata_reg_t fdata; i2c_reg2hw_fifo_ctrl_reg_t fifo_ctrl; i2c_reg2hw_ovrd_reg_t ovrd; i2c_reg2hw_timing0_reg_t timing0; i2c_reg2hw_timing1_reg_t timing1; i2c_reg2hw_timing2_reg_t timing2; i2c_reg2hw_timing3_reg_t timing3; i2c_reg2hw_timing4_reg_t timing4; i2c_reg2hw_timeout_ctrl_reg_t timeout_ctrl; i2c_reg2hw_target_id_reg_t target_id; i2c_reg2hw_acqdata_reg_t acqdata; i2c_reg2hw_txdata_reg_t txdata; i2c_reg2hw_stretch_ctrl_reg_t stretch_ctrl; i2c_reg2hw_host_timeout_ctrl_reg_t host_timeout_ctrl; } |
Register -> HW type |
i2c_hw2reg_t | struct packed { i2c_hw2reg_intr_state_reg_t intr_state; i2c_hw2reg_status_reg_t status; i2c_hw2reg_rdata_reg_t rdata; i2c_hw2reg_fifo_status_reg_t fifo_status; i2c_hw2reg_val_reg_t val; i2c_hw2reg_acqdata_reg_t acqdata; i2c_hw2reg_stretch_ctrl_reg_t stretch_ctrl; } |
HW -> register type |