Entity: lc_ctrl_state_decode

Diagram

lc_state_valid_i lc_state_e lc_state_i lc_cnt_e lc_cnt_i lc_tx_t secrets_valid_i fsm_state_e fsm_state_i dec_lc_state_e dec_lc_state_o dec_lc_id_state_e dec_lc_id_state_o dec_lc_cnt_t dec_lc_cnt_o [5:0] state_invalid_error_o

Description

Copyright lowRISC contributors. Licensed under the Apache License, Version 2.0, see LICENSE for details. SPDX-License-Identifier: Apache-2.0

Life cycle state decoder. This is a purely combinational module.

Ports

Port name Direction Type Description
lc_state_valid_i input Life cycle state vector.
lc_state_i input lc_state_e
lc_cnt_i input lc_cnt_e
secrets_valid_i input lc_tx_t
fsm_state_i input fsm_state_e Main FSM state.
dec_lc_state_o output dec_lc_state_e Decoded state vector.
dec_lc_id_state_o output dec_lc_id_state_e
dec_lc_cnt_o output dec_lc_cnt_t
state_invalid_error_o output [5:0]

Processes

Type: always_comb

Description
//////////////////////// Signal Decoder Logic // //////////////////////// The decoder logic below decodes the life cycle state vector and counter into a format that can be exposed in the CSRs. If the state is invalid, this will be flagged as well.