Entity: rom_ctrl_rom_reg_top

Diagram

clk_i rst_ni tl_i tl_win_i devmode_i tl_o tl_win_o intg_err_o

Description

Copyright lowRISC contributors. Licensed under the Apache License, Version 2.0, see LICENSE for details. SPDX-License-Identifier: Apache-2.0

Register Top module auto-generated by reggen

Ports

Port name Direction Type Description
clk_i input
rst_ni input
tl_i input
tl_o output
tl_win_o output Output port for window
tl_win_i input
intg_err_o output To HW Integrity check errors
devmode_i input If 1, explicit error return for unmapped register access

Signals

Name Type Description
intg_err logic incoming payload check
intg_err_q logic
tl_o_pre tlul_pkg::tl_d2h_t outgoing integrity generation
unused_devmode logic Unused signal tieoff devmode_i is not used if there are no registers

Processes

Type: always_ff

Instantiations