Package: rv_core_ibex_reg_pkg

Description

Copyright lowRISC contributors.
Licensed under the Apache License, Version 2.0, see LICENSE for details.
SPDX-License-Identifier: Apache-2.0

Register Package auto-generated by reggen containing data structure

Constants

Name Type Value Description
NumSwAlerts int 2
NumRegions int 2
NumAlerts int 4
CfgAw int 7 Address widths within the block
CfgAw logic [CfgAw-1:0] undefined Register offsets for cfg interface
CfgAw logic [CfgAw-1:0] 4
CfgAw logic [CfgAw-1:0] 8
CfgAw logic [CfgAw-1:0] c
CfgAw logic [CfgAw-1:0] 10
CfgAw logic [CfgAw-1:0] 14
CfgAw logic [CfgAw-1:0] 18
CfgAw logic [CfgAw-1:0] c
CfgAw logic [CfgAw-1:0] 20
CfgAw logic [CfgAw-1:0] 24
CfgAw logic [CfgAw-1:0] 28
CfgAw logic [CfgAw-1:0] c
CfgAw logic [CfgAw-1:0] 30
CfgAw logic [CfgAw-1:0] 34
CfgAw logic [CfgAw-1:0] 38
CfgAw logic [CfgAw-1:0] c
CfgAw logic [CfgAw-1:0] 40
CfgAw logic [CfgAw-1:0] 44
CfgAw logic [CfgAw-1:0] 48
CfgAw logic [CfgAw-1:0] c
CfgAw logic [CfgAw-1:0] 50
CfgAw logic [CfgAw-1:0] 54
CfgAw logic [CfgAw-1:0] 58
CfgAw logic [CfgAw-1:0] c
RV_CORE_IBEX_ALERT_TEST_RESVAL logic [3:0] undefined Reset values for hwext registers and their fields for cfg interface
RV_CORE_IBEX_ALERT_TEST_FATAL_SW_ERR_RESVAL logic [0:0] undefined
RV_CORE_IBEX_ALERT_TEST_RECOV_SW_ERR_RESVAL logic [0:0] undefined
RV_CORE_IBEX_ALERT_TEST_FATAL_HW_ERR_RESVAL logic [0:0] undefined
RV_CORE_IBEX_ALERT_TEST_RECOV_HW_ERR_RESVAL logic [0:0]
RV_CORE_IBEX_CFG_PERMIT logic [3:0] undefined Register width information to check illegal writes for cfg interface

Types

Name Type Description
rv_core_ibex_reg2hw_alert_test_reg_t struct packed {
struct packed {
logic q;
logic qe;
} fatal_sw_err;
struct packed {
logic q;
logic qe;
} recov_sw_err;
struct packed {
logic q;
logic qe;
} fatal_hw_err;
struct packed {
logic q;
logic qe;
} recov_hw_err;
}		 //////////////////////////////////////////// Typedefs for registers for cfg interface // ////////////////////////////////////////////
rv_core_ibex_reg2hw_sw_alert_mreg_t struct packed {
logic [1:0] q;
}
rv_core_ibex_reg2hw_ibus_addr_en_mreg_t struct packed {
logic q;
}
rv_core_ibex_reg2hw_ibus_addr_matching_mreg_t struct packed {
logic [31:0] q;
}
rv_core_ibex_reg2hw_ibus_remap_addr_mreg_t struct packed {
logic [31:0] q;
}
rv_core_ibex_reg2hw_dbus_addr_en_mreg_t struct packed {
logic q;
}
rv_core_ibex_reg2hw_dbus_addr_matching_mreg_t struct packed {
logic [31:0] q;
}
rv_core_ibex_reg2hw_dbus_remap_addr_mreg_t struct packed {
logic [31:0] q;
}
rv_core_ibex_reg2hw_nmi_enable_reg_t struct packed {
struct packed {
logic q;
} alert_en;
struct packed {
logic q;
} wdog_en;
}
rv_core_ibex_reg2hw_nmi_state_reg_t struct packed {
struct packed {
logic q;
} alert;
struct packed {
logic q;
} wdog;
}
rv_core_ibex_hw2reg_nmi_state_reg_t struct packed {
struct packed {
logic d;
logic de;
} alert;
struct packed {
logic d;
logic de;
} wdog;
}
rv_core_ibex_hw2reg_err_status_reg_t struct packed {
struct packed {
logic d;
logic de;
} reg_intg_err;
struct packed {
logic d;
logic de;
} fatal_intg_err;
struct packed {
logic d;
logic de;
} fatal_core_err;
struct packed {
logic d;
logic de;
} recov_core_err;
}
rv_core_ibex_reg2hw_sw_alert_mreg_t struct packed {
rv_core_ibex_reg2hw_alert_test_reg_t alert_test;
rv_core_ibex_reg2hw_sw_alert_mreg_t [1:0] sw_alert;
rv_core_ibex_reg2hw_ibus_addr_en_mreg_t [1:0] ibus_addr_en;
rv_core_ibex_reg2hw_ibus_addr_matching_mreg_t [1:0] ibus_addr_matching;
rv_core_ibex_reg2hw_ibus_remap_addr_mreg_t [1:0] ibus_remap_addr;
rv_core_ibex_reg2hw_dbus_addr_en_mreg_t [1:0] dbus_addr_en;
rv_core_ibex_reg2hw_dbus_addr_matching_mreg_t [1:0] dbus_addr_matching;
rv_core_ibex_reg2hw_dbus_remap_addr_mreg_t [1:0] dbus_remap_addr;
rv_core_ibex_reg2hw_nmi_enable_reg_t nmi_enable;
rv_core_ibex_reg2hw_nmi_state_reg_t nmi_state;
}		 Register -> HW type for cfg interface
rv_core_ibex_cfg_hw2reg_t struct packed {
rv_core_ibex_hw2reg_nmi_state_reg_t nmi_state;
rv_core_ibex_hw2reg_err_status_reg_t err_status;
}		 HW -> register type for cfg interface