Package: rv_plic_reg_pkg

Description

Copyright lowRISC contributors.
Licensed under the Apache License, Version 2.0, see LICENSE for details.
SPDX-License-Identifier: Apache-2.0

Register Package auto-generated by reggen containing data structure

Constants

Name Type Value Description
NumSrc int 32
NumTarget int 1
PrioWidth int 3
NumAlerts int 1
BlockAw int 10 Address widths within the block
BlockAw logic [BlockAw-1:0] undefined Register offsets
BlockAw logic [BlockAw-1:0] 4
BlockAw logic [BlockAw-1:0] 8
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 10
BlockAw logic [BlockAw-1:0] 14
BlockAw logic [BlockAw-1:0] 18
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 20
BlockAw logic [BlockAw-1:0] 24
BlockAw logic [BlockAw-1:0] 28
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 30
BlockAw logic [BlockAw-1:0] 34
BlockAw logic [BlockAw-1:0] 38
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 40
BlockAw logic [BlockAw-1:0] 44
BlockAw logic [BlockAw-1:0] 48
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 50
BlockAw logic [BlockAw-1:0] 54
BlockAw logic [BlockAw-1:0] 58
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 60
BlockAw logic [BlockAw-1:0] 64
BlockAw logic [BlockAw-1:0] 68
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 70
BlockAw logic [BlockAw-1:0] 74
BlockAw logic [BlockAw-1:0] 78
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 80
BlockAw logic [BlockAw-1:0] 84
BlockAw logic [BlockAw-1:0] 100
BlockAw logic [BlockAw-1:0] 104
BlockAw logic [BlockAw-1:0] 108
BlockAw logic [BlockAw-1:0] c
BlockAw logic [BlockAw-1:0] 200
RV_PLIC_CC0_RESVAL logic [4:0] undefined Reset values for hwext registers and their fields
RV_PLIC_ALERT_TEST_RESVAL logic [0:0]
RV_PLIC_PERMIT logic [3:0] undefined Register width information to check illegal writes

Types

Name Type Description
rv_plic_reg2hw_le_mreg_t struct packed {
logic q;
}		 ////////////////////////// Typedefs for registers // //////////////////////////
rv_plic_reg2hw_prio0_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio1_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio2_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio3_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio4_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio5_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio6_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio7_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio8_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio9_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio10_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio11_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio12_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio13_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio14_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio15_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio16_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio17_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio18_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio19_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio20_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio21_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio22_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio23_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio24_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio25_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio26_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio27_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio28_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio29_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio30_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_prio31_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_ie0_mreg_t struct packed {
logic q;
}
rv_plic_reg2hw_threshold0_reg_t struct packed {
logic [2:0] q;
}
rv_plic_reg2hw_cc0_reg_t struct packed {
logic [4:0] q;
logic qe;
logic re;
}
rv_plic_reg2hw_msip0_reg_t struct packed {
logic q;
}
rv_plic_reg2hw_alert_test_reg_t struct packed {
logic q;
logic qe;
}
rv_plic_hw2reg_ip_mreg_t struct packed {
logic d;
logic de;
}
rv_plic_hw2reg_cc0_reg_t struct packed {
logic [4:0] d;
}
rv_plic_reg2hw_le_mreg_t struct packed {
rv_plic_reg2hw_le_mreg_t [31:0] le;
rv_plic_reg2hw_prio0_reg_t prio0;
rv_plic_reg2hw_prio1_reg_t prio1;
rv_plic_reg2hw_prio2_reg_t prio2;
rv_plic_reg2hw_prio3_reg_t prio3;
rv_plic_reg2hw_prio4_reg_t prio4;
rv_plic_reg2hw_prio5_reg_t prio5;
rv_plic_reg2hw_prio6_reg_t prio6;
rv_plic_reg2hw_prio7_reg_t prio7;
rv_plic_reg2hw_prio8_reg_t prio8;
rv_plic_reg2hw_prio9_reg_t prio9;
rv_plic_reg2hw_prio10_reg_t prio10;
rv_plic_reg2hw_prio11_reg_t prio11;
rv_plic_reg2hw_prio12_reg_t prio12;
rv_plic_reg2hw_prio13_reg_t prio13;
rv_plic_reg2hw_prio14_reg_t prio14;
rv_plic_reg2hw_prio15_reg_t prio15;
rv_plic_reg2hw_prio16_reg_t prio16;
rv_plic_reg2hw_prio17_reg_t prio17;
rv_plic_reg2hw_prio18_reg_t prio18;
rv_plic_reg2hw_prio19_reg_t prio19;
rv_plic_reg2hw_prio20_reg_t prio20;
rv_plic_reg2hw_prio21_reg_t prio21;
rv_plic_reg2hw_prio22_reg_t prio22;
rv_plic_reg2hw_prio23_reg_t prio23;
rv_plic_reg2hw_prio24_reg_t prio24;
rv_plic_reg2hw_prio25_reg_t prio25;
rv_plic_reg2hw_prio26_reg_t prio26;
rv_plic_reg2hw_prio27_reg_t prio27;
rv_plic_reg2hw_prio28_reg_t prio28;
rv_plic_reg2hw_prio29_reg_t prio29;
rv_plic_reg2hw_prio30_reg_t prio30;
rv_plic_reg2hw_prio31_reg_t prio31;
rv_plic_reg2hw_ie0_mreg_t [31:0] ie0;
rv_plic_reg2hw_threshold0_reg_t threshold0;
rv_plic_reg2hw_cc0_reg_t cc0;
rv_plic_reg2hw_msip0_reg_t msip0;
rv_plic_reg2hw_alert_test_reg_t alert_test;
}		 Register -> HW type
rv_plic_hw2reg_ip_mreg_t struct packed {
rv_plic_hw2reg_ip_mreg_t [31:0] ip;
rv_plic_hw2reg_cc0_reg_t cc0;
}		 HW -> register type