Package: usbuart_reg_pkg
- File: usbuart_reg_pkg.sv
Description
Copyright lowRISC contributors.
Licensed under the Apache License, Version 2.0, see LICENSE for details.
SPDX-License-Identifier: Apache-2.0
Register Package auto-generated by reggen
containing data structure
Constants
Name | Type | Value | Description |
---|---|---|---|
NumAlerts | int | 1 | |
BlockAw | int | 6 | Address widths within the block |
BlockAw | logic [BlockAw-1:0] | undefined | Register offsets |
BlockAw | logic [BlockAw-1:0] | 4 | |
BlockAw | logic [BlockAw-1:0] | 8 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 10 | |
BlockAw | logic [BlockAw-1:0] | 14 | |
BlockAw | logic [BlockAw-1:0] | 18 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 20 | |
BlockAw | logic [BlockAw-1:0] | 24 | |
BlockAw | logic [BlockAw-1:0] | 28 | |
BlockAw | logic [BlockAw-1:0] | c | |
BlockAw | logic [BlockAw-1:0] | 30 | |
BlockAw | logic [BlockAw-1:0] | 34 | |
BlockAw | logic [BlockAw-1:0] | 38 | |
USBUART_INTR_TEST_RESVAL | logic [7:0] | undefined | Reset values for hwext registers and their fields |
USBUART_INTR_TEST_TX_WATERMARK_RESVAL | logic [0:0] | undefined | |
USBUART_INTR_TEST_RX_WATERMARK_RESVAL | logic [0:0] | undefined | |
USBUART_INTR_TEST_TX_OVERFLOW_RESVAL | logic [0:0] | undefined | |
USBUART_INTR_TEST_RX_OVERFLOW_RESVAL | logic [0:0] | undefined | |
USBUART_INTR_TEST_RX_FRAME_ERR_RESVAL | logic [0:0] | undefined | |
USBUART_INTR_TEST_RX_BREAK_ERR_RESVAL | logic [0:0] | undefined | |
USBUART_INTR_TEST_RX_TIMEOUT_RESVAL | logic [0:0] | undefined | |
USBUART_INTR_TEST_RX_PARITY_ERR_RESVAL | logic [0:0] | undefined | |
USBUART_ALERT_TEST_RESVAL | logic [0:0] | undefined | |
USBUART_ALERT_TEST_FATAL_FAULT_RESVAL | logic [0:0] | undefined | |
USBUART_STATUS_RESVAL | logic [5:0] | undefined | |
USBUART_RDATA_RESVAL | logic [7:0] | undefined | |
USBUART_FIFO_STATUS_RESVAL | logic [21:0] | undefined | |
USBUART_VAL_RESVAL | logic [15:0] | undefined | |
USBUART_USBSTAT_RESVAL | logic [22:0] | undefined | |
USBUART_USBPARAM_RESVAL | logic [17:0] | ||
USBUART_PERMIT | logic [3:0] | undefined | Register width information to check illegal writes |
Types
Name | Type | Description |
---|---|---|
usbuart_reg2hw_intr_state_reg_t | struct packed { struct packed { logic q; } tx_watermark; struct packed { logic q; } rx_watermark; struct packed { logic q; } tx_overflow; struct packed { logic q; } rx_overflow; struct packed { logic q; } rx_frame_err; struct packed { logic q; } rx_break_err; struct packed { logic q; } rx_timeout; struct packed { logic q; } rx_parity_err; } |
////////////////////////// Typedefs for registers // ////////////////////////// |
usbuart_reg2hw_intr_enable_reg_t | struct packed { struct packed { logic q; } tx_watermark; struct packed { logic q; } rx_watermark; struct packed { logic q; } tx_overflow; struct packed { logic q; } rx_overflow; struct packed { logic q; } rx_frame_err; struct packed { logic q; } rx_break_err; struct packed { logic q; } rx_timeout; struct packed { logic q; } rx_parity_err; } |
|
usbuart_reg2hw_intr_test_reg_t | struct packed { struct packed { logic q; logic qe; } tx_watermark; struct packed { logic q; logic qe; } rx_watermark; struct packed { logic q; logic qe; } tx_overflow; struct packed { logic q; logic qe; } rx_overflow; struct packed { logic q; logic qe; } rx_frame_err; struct packed { logic q; logic qe; } rx_break_err; struct packed { logic q; logic qe; } rx_timeout; struct packed { logic q; logic qe; } rx_parity_err; } |
|
usbuart_reg2hw_alert_test_reg_t | struct packed { logic q; logic qe; } |
|
usbuart_reg2hw_ctrl_reg_t | struct packed { struct packed { logic q; } tx; struct packed { logic q; } rx; struct packed { logic q; } nf; struct packed { logic q; } slpbk; struct packed { logic q; } llpbk; struct packed { logic q; } parity_en; struct packed { logic q; } parity_odd; struct packed { logic [1:0] q; } rxblvl; struct packed { logic [15:0] q; } nco; } |
|
usbuart_reg2hw_rdata_reg_t | struct packed { logic [7:0] q; logic re; } |
|
usbuart_reg2hw_wdata_reg_t | struct packed { logic [7:0] q; logic qe; } |
|
usbuart_reg2hw_fifo_ctrl_reg_t | struct packed { struct packed { logic q; logic qe; } rxrst; struct packed { logic q; logic qe; } txrst; struct packed { logic [2:0] q; logic qe; } rxilvl; struct packed { logic [1:0] q; logic qe; } txilvl; } |
|
usbuart_reg2hw_ovrd_reg_t | struct packed { struct packed { logic q; } txen; struct packed { logic q; } txval; } |
|
usbuart_reg2hw_timeout_ctrl_reg_t | struct packed { struct packed { logic [23:0] q; } val; struct packed { logic q; } en; } |
|
usbuart_hw2reg_intr_state_reg_t | struct packed { struct packed { logic d; logic de; } tx_watermark; struct packed { logic d; logic de; } rx_watermark; struct packed { logic d; logic de; } tx_overflow; struct packed { logic d; logic de; } rx_overflow; struct packed { logic d; logic de; } rx_frame_err; struct packed { logic d; logic de; } rx_break_err; struct packed { logic d; logic de; } rx_timeout; struct packed { logic d; logic de; } rx_parity_err; } |
|
usbuart_hw2reg_status_reg_t | struct packed { struct packed { logic d; } txfull; struct packed { logic d; } rxfull; struct packed { logic d; } txempty; struct packed { logic d; } txidle; struct packed { logic d; } rxidle; struct packed { logic d; } rxempty; } |
|
usbuart_hw2reg_rdata_reg_t | struct packed { logic [7:0] d; } |
|
usbuart_hw2reg_fifo_ctrl_reg_t | struct packed { struct packed { logic d; logic de; } rxrst; struct packed { logic d; logic de; } txrst; struct packed { logic [2:0] d; logic de; } rxilvl; struct packed { logic [1:0] d; logic de; } txilvl; } |
|
usbuart_hw2reg_fifo_status_reg_t | struct packed { struct packed { logic [5:0] d; } txlvl; struct packed { logic [5:0] d; } rxlvl; } |
|
usbuart_hw2reg_val_reg_t | struct packed { logic [15:0] d; } |
|
usbuart_hw2reg_usbstat_reg_t | struct packed { struct packed { logic [10:0] d; } frame; struct packed { logic d; } host_timeout; struct packed { logic d; } host_lost; struct packed { logic [6:0] d; } device_address; } |
|
usbuart_hw2reg_usbparam_reg_t | struct packed { struct packed { logic [15:0] d; } baud_req; struct packed { logic [1:0] d; } parity_req; } |
|
usbuart_reg2hw_t | struct packed { usbuart_reg2hw_intr_state_reg_t intr_state; usbuart_reg2hw_intr_enable_reg_t intr_enable; usbuart_reg2hw_intr_test_reg_t intr_test; usbuart_reg2hw_alert_test_reg_t alert_test; usbuart_reg2hw_ctrl_reg_t ctrl; usbuart_reg2hw_rdata_reg_t rdata; usbuart_reg2hw_wdata_reg_t wdata; usbuart_reg2hw_fifo_ctrl_reg_t fifo_ctrl; usbuart_reg2hw_ovrd_reg_t ovrd; usbuart_reg2hw_timeout_ctrl_reg_t timeout_ctrl; } |
Register -> HW type |
usbuart_hw2reg_t | struct packed { usbuart_hw2reg_intr_state_reg_t intr_state; usbuart_hw2reg_status_reg_t status; usbuart_hw2reg_rdata_reg_t rdata; usbuart_hw2reg_fifo_ctrl_reg_t fifo_ctrl; usbuart_hw2reg_fifo_status_reg_t fifo_status; usbuart_hw2reg_val_reg_t val; usbuart_hw2reg_usbstat_reg_t usbstat; usbuart_hw2reg_usbparam_reg_t usbparam; } |
HW -> register type |