Documentation for:

Generated by TerosHDL © 2020-2021 License GPLv3
Carlos Alberto Ruiz Naranjo (carlosruiznaranjo@gmail.com)
Ismael Perez Rojo (ismaelprojo@gmail.com)

Project revision 2021-09-06 13:44:27

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/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_mcmm.vhd->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_plle2.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/fpga-random.vhdl fpga-random.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/main_bram.vhdl main_bram.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/pp_fifo.vhd pp_fifo.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/pp_soc_uart.vhd pp_soc_uart.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/pp_soc_uart.vhd->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/pp_fifo.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/pp_utilities.vhd pp_utilities.vhd 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/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-acorn-cle-215.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/soc_reset.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-nexys-video.vhdl top-nexys-video.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-acorn-cle-215.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-nexys-video.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-arty.vhdl top-arty.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-arty.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_ecp5.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-arty.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_plle2.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-arty.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/soc_reset.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-arty.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-nexys-video.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-generic.vhdl top-generic.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-generic.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_ecp5.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-generic.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_plle2.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-generic.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/soc_reset.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-generic.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-nexys-video.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-genesys2.vhdl top-genesys2.vhdl /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-genesys2.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_ecp5.vhd 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/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-nexys-video.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/clk_gen_plle2.vhd /home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/top-nexys-video.vhdl->/home/runner/work/teroshdl-documenter-demo/teroshdl-documenter-demo/microwatt/fpga/soc_reset.vhdl

Designs